LatticeECP3 CPRI Solutions Video

The increasing need for low-power and low-cost platforms in wireless infrastructure equipment makes the LatticeECP3 FPGA the ideal choice for achieving the lowest bill of materials cost. 

The LatticeECP3 FPGA family offers multi-protocol 3.2G SERDES with low latency option in the physical coding sub-layer (PCS) for a smaller and cleaner CPRI implementation.  Other features include DDR1/2/3 memory interfaces, powerful DSP capabilities, high density on-chip memory and up to 149K LUTS, all with half the power consumption and half the price of competitive SERDES-capable FPGAs

Watch this 5-minute video to:

• Learn about the distributed wireless base-station topology
• Understand the CPRI implementation on the LatticeECP3 FPGA
• See a demonstration of the low latency variation CPRI link implemented with the ECP3

Take the Next Step

• Download CPRI demo
• Evaluate CPRI IP Core
• Contact Lattice Sales to order one of the LatticeECP3 Evaluation Boards
• Buy Devices at the Lattice online store
• Learn More about the LatticeECP3 FPGA family