The ispGDX2 family is Lattice's next generation in-system programmable (ISP) high performance digital crosspoint switch for high-speed bus switching and interfacing with bandwidth of up to 38Gbps. This family combines a flexible switching architecture with advanced high speed serial I/O (sysHSI blocks), sysCLOCK PLLs, and sysIO interfaces to meet the needs of today's high-speed systems. A multiplexer based architecture and on chip control logic facilitate the high performance implementation of common switching functions. Devices in the family can operate at 3.3, 2.5 & 1.8V core Voltage.
The ispGDX2 family is available in two options. The standard device supports SYSHSI availability for ultra fast serial communications and the "E-Series", a high performance, low-cost device with no sysHSI functionality.
| Vcc | Device | Registers | PLLs | Duplex SERDES Channels* |
Speed tPDFmax |
I/Os | Packaging | |
|---|---|---|---|---|---|---|---|---|
| 1.8 | ispGDX2/E-64C | 64 | 2 | 4 | 3.0 | 360 | 64 | 100-fpBGA |
| ispGDX2/E-128C | 128 | 2 | 8 | 3.2 | 330 | 128 | 208-fpBGA | |
| ispGDX2/E-256C | 256 | 4 | 16 | 3.5 | 300 | 256 | 484-fpBGA | |
| 2.5 | ispGDX2/E-64B | 64 | 2 | 4 | 3.0 | 360 | 64 | 100-fpBGA |
| ispGDX2/E-128B | 128 | 2 | 8 | 3.2 | 330 | 128 | 208-fpBGA | |
| ispGDX2/E-256B | 256 | 4 | 16 | 3.5 | 300 | 256 | 484-fpBGA | |
| 3.3 | ispGDX2/E-64V | 64 | 2 | 4 | 3.0 | 360 | 64 | 100-fpBGA |
| ispGDX2/E-128V | 128 | 2 | 8 | 3.2 | 330 | 128 | 208-fpBGA | |
| ispGDX2/E-256V | 256 | 4 | 16 | 3.5 | 300 | 256 | 484-fpBGA | |
The diagrams below shows the major blocks of the ispGDX2-64 device.
Click diagrams to view enlargements.
![]() ispGDX2-64 Top Level Diagram |
![]() sysCLOCK PLL |
![]() sysHSI |
![]() GDX Block |
![]() sysIO |
![]() MRB Block |
Click here for information on related older device families