LatticeSC PCI Express x1 Evaluation Board

The LatticeSC PCI Express x1 Evaluation Board provides a stable yet flexible platform designed to help the user quickly evaluate the performance of the LatticeSC/M FPGA or aid in development of custom designs. For more evaluation board options, see the LatticeSC PCI Express x8 Evaluation Board and LatticeSC Communications Board.

Device Support

You will need the following software to use this board:

  • ispLEVER for design, fitting, place & route of Lattice programmable devices
  • ispVM to download your program to the LatticeSC or on-board Flash memory devices, and ispClock device

Jump to

Kit Contents

  • LatticeSC PCI Express x1 Evaluation Board featuring:
    • LFSCM3GA25E-6F900C FPGA Device
    • x1 PCI Express edge connector / form-factor
    • On-board QDR2 and RLDRAM2 Memory
    • SATA Host/Target
    • 1Gbe SFP
    • SMA connectors for SERDES I/O, LVDS evaluation, and external clock I/O
    • Tri-speed Ethernet PHY with RJ45 jack
    • RS-232 port
    • On-board Flash configuration memory
    • Various LEDs, switches, connectors, headers, and on-board power control
  • ispDOWNLOAD cable for device programming
  • Power Supply

Board Photos

Top View

Click image to enlarge

Ordering Information

  • This product is no longer available for sale.

  • The information provided on this page is for reference only.
  • For reference purposes only, Part Number: LFSC25E-P1-EV
  • Contact your local Lattice sales representative for further information.

Documentation

Quick Reference
Technical Resources
Information Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
LatticeSC PCI Express x1 Evaluation Board User's Manual
Describes the features and functions of the LatticeSC PCI Express x1 Evaluation Board. Includes schematics.
EB24 01.4 11/4/2008 PDF 1.4 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
PCN14A-10 Notification of Coplanarity and height specification changes for the 1152-ball and 1704-ball organic flip chip BGA for the LatticeSC/SCM families of FPGAs - Japanese Lanauage
PCN14A-10 1 9/7/2010 PDF 462.4 KB
PCN14A-10 Notification of Coplanarity and height specification changes for the 1152-ball and 1704-ball organic flip chip BGA for the LatticeSC/SCM families of FPGAs
PCN14A-10 1 9/7/2010 PDF 339.7 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
LatticeMico32 Tutorial
8.0 3/24/2010 PDF 1.5 MB
LatticeMico32 Tutorial for Diamond 2.0.1
2.0.1 10/2/2012 PDF 1.9 MB

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