Common Scrambling Algorithm Cores

Helion Tech LogoThe Helion DVB-CSA cores implement the ETSI specified Common Scrambling Algorithm (CSA) which is used to provide the conditional access mechanism for MPEG-2 video streams for use in Pay-TV systems adopted by Digital Video Broadcasting (DVB) consortium. It has also been specified by the European Broadcasting Union (EBU) for use within Digital Satellite News Gathering (DSNG) applications, where it provides data security within the Basic Interoperable Scrambling System (BISS) Mode 1 and Mode E specifications.

Both cores have been designed especially to provide high performance combined with low logic resource utilisation in Lattice FPGA technology. The cores can support DVB scrambling and descrambling applications capable of data throughputs up to 200 Mbps in LatticeECP3 devices.

Features

  • Implements ETSI specified DVB Common Scrambling Algorithm
  • Ideal for use in BISS-E and BISS Mode-1 Digital Satellite News Gathering applications
  • Available as separate Scrambler and Descrambler cores for optimum system efficiency
  • Internal 3-stage pipeline for optimum Scrambler data throughput
  • Capable of Scrambler/Descrambler data throughputs up to 200 Mbps
  • Simple interfacing to user logic with separate key and data ports
  • Highly optimised for Lattice FPGAs

Jump to

Block Diagram

Ordering Information

This IP core is supported and sold by Helion Technology, contact Helion Technology at info@heliontech.com or visit their website at www.heliontech.com for more information.

Documentation

Quick Reference
TITLE NUMBER VERSION DATE FORMAT SIZE
Helion Technology - Common Scrambling Algorithm Cores
3/23/2011 PDF 69.3 KB


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