EP560: SD / SDIO / MMC Slave Controller

The EP560 is a slave controller for SD memory card, SDIO and MMC interfaces. The controller is designed to reside within an SD memory, SDIO, or SD Combo Card. It serves as an interface between the SD bus and user logic that provides the actual function of the card.

It is a very flexible architecture supporting variable clock rate from 0 to 25Mhz and data width of 1 to 4 bits. A data rate of up to 12.5Mbyte/sec (100Mbs) can be realized with SD interface. Features such as plug and play, auto-detection, error correction, write protection are standard with SD card interface.

As a slave device, the SD slave controller receives commands from the host through the SD interface. Most of the commands are processed locally by the controller without any help from the user logic. The majority of the standard SD register set is also implemented within the slave controller and process by the core without help from the user logic.

There are several options for user hardware interface to the controller core. In the normal DMA mode, the EP560 is a bus master that transfers data between the user’s memory and the SD host. In the optional interrupt mode, the communication between the EP560 and the user logic is interrupt driven.

With the EP560, SD card interface can be realized with very little development cost. Designer can add SD memory and SDIO interface to the system by simply adding the EP560 module without changing the rest of the system architecture.

See the Datasheet for more details.

Features

  • Slave controller for SDIO, SD memory card, and MMC interface
  • Compatible with SD/SDIO specification 2.0 with 1 and 4 bit data transfer
  • Option to support MMC 8-bit data width
  • DMA mode or interrupt modes
  • Support for both standard capacity and high capacity (SDHC) memory cards
  • Supports high speed mode up to maximum transfer rate of 25Mbyte/sec for SD and 50Mbyte/sec for MMC
  • Selectable maximum block size from 512 to 16Kbytes
  • Each IO function includes up to 4096 bytes of data buffer
  • Optional Wishbone bus compatible
  • Options also for AHB, APB, SH4 and Generic user interfaces

Jump to

Block Diagram

Performance and Size

The following are typical performance and utilization results.

Lattice Device Utilization Performance
(MHz)
Slices Percentage
LFE2-50E 2132 9 102
LFE2M-50E 2131 9 97
LFXP15C 2067 27 68
LFXP2-17 2132 26 88
LFSC3GA15E 2228 10 145

Ordering Information

This IP core is supported and sold by Eureka Technology, contact Eureka Technology at info@eurekatech.com or visit their website at www.eurekatech.com for more information.

Documentation

Quick Reference
TITLE NUMBER VERSION DATE FORMAT SIZE
Eureka: EP560 SD / SDIO / MMC Slave Controller
4/15/2008 PDF 116.6 KB

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