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Device Programming


ispLEVER 5.0  The ispVM System is included with ispLEVER, and is also available as a stand-alone device programming manager. The ispVM System™ is a comprehensive design download package that provides an efficient method of programming Lattice devices using JEDEC and Bitstream files generated by ispLEVER, PAC-Designer, and other design tools.

To download, visit the ispVM System download page.

 

Features

  • New STAPL Programming Features:
    • Accepts Non-Lattice STAPL file input
    • Outputs STAPL programming files for Lattice Flash based devices
    • STAPL Debugger
  • ISC Programming Features:
    • Accepts ISC BSDL file input
    • Accepts ISC data file input
    • Supports 9 Lattice ISC-compliant device families
  • Supports Transparent Field Reconfiguration (TransFR) for the MachXO and LatticeXP FPGAs
  • SPI Flash programming for the LatticeECP/EC, LatticeECP2/M, and LatticeSC/M FPGAs
  • Supports Sequential and Turbo ispDOWNLOAD
  • Supports Programming Through SVF File, ISC BSDL and data files, and STAPL files
  • Support for IEEE 1532 (2000) programming standard
  • Easy-to-Use Graphical User Interfaces (GUI)
    • Main ispVM System Window
    • SVF Debugger
    • Customizable Windows
  • Includes ispVM-DLxConnect tool to manage gang programming with up to 8 USB connections on separate printed circuit boards.
  • Command Line Mode
  • Auto Scan Device Chains
  • Automatically Convert Existing .dld and .wch Files
  • Built-in File Manager
  • Built-in SVF (Serial Vector Format) File Editor
  • Built-in ATE Programming Vector Generator
    • Supports HP, Genrad, Teardyne, and Marconi ATE Equipment
    • Advanced ATE Vector Generation Features
  • Specify I/O States During Programming
  • Specify Programming Clock Frequency
  • Specify Bypass Instructions
  • Override Device Programming Operations
  • Program Entire Chain or Selected Device(s)
  • Selectable Contention Reduction Option
  • Selectable Starting and Ending TAP Register States
  • USERCODE/UES Editor
  • User Accessible Comment Field
  • Board Diagnostics Option
  • Selectable Cable, Port, Chain File, Scan, and Display Options

The ispVM System supports both serial and TURBO ispDOWNLOAD™ programming in a PC environment. The Windows-like Graphical User Interface (GUI) is designed to allow users to automatically scan a system board and to browse and select from the built-in file manager the required JEDEC files for programming.

This tool supports programming of all Lattice ISP devices and non-Lattice devices that are compliant with the IEEE 1149.1 standard through a vendor supplied SVF file. This version of the ispVM System also supports IEEE 1532 ISC Data file generation for Lattice ispJTAG™ devices.

The ispVM System software can now generate VME files supporting both ispJTAG and non-Lattice JTAG files which are compliant to the IEEE 1149.1 standard and support SVF or IEEE 1532 formats. The VME file is used to support ispVM Embedded programming. The VME file is a hex coded file that takes the chain information from the ispVM System window and can then be encoded with the source code provided for embedded programming. See the ispVM Embedded directory which is installed with ispVM System software.

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