 |
 ispLEVER helps you complete your HDL or schematic design work with simple and powerful tools. Whether your design includes files in multiple locations, generated from multiple sources, or of multiple formats, ispLEVER helps you get everything working together.
Click the items below to learn more about these powerful features and tools included with ispLEVER.
|
IPexpress
 IPexpress is the interface to the Lattice catalog of functional modules, reference designs, and intellectual property(IP), all optimized for Lattice programmable products. IPexpress helps accellerate the design process by helping you smoothly configura and integrate these functions into your custom design. Lattice IP cores include some of the most popular industry-standard functions such as PCI bus controllers, DDR memory controllers, Ethernet MACs, DSP functions and many more. To learn more about these IP cores, click here. |
HDL Text Editor
 ispLEVER includes an intuitive HDL text editor that includes keyword highlight support for: VHDL, Verilog HDL, EDIF, and the Lattice Preference Language. You also set your favorite editor as the default. |
Schematic Editor
|
 The ispLEVER Schematic Editor helps you visualize programmable logic designs in a graphical format using block diagrams of HDL blocks or gate-level schematics for all device families.
For bottom-up fully schematic design, ispLEVER gate-level schematic libraries are provided for the following device families: ispMACH 4000Z, ispMACH4000V/B/C, ispXPLD5000MV/B/C, ispMACH 4A5, ispGAL, and GAL.
|
MATLAB®/Simulink® DSP Blocks
| ispLEVER includes dozens of DSP-function blocks optimized for use in Lattice programmable technologies. These blocks are for use in the MATLAB/Simulink DSP design environment (Available separately from The MathWorks). For more information on The MathWorks products visit their website. |
|
|
|
|
|
Sign In
