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There are 4 variations of ispLEVER, tailored to meet your specific design requirements. Descriptions of each variation are below. Click the links to learn more. ispLEVER
ispLEVER 7.1 Service Pack 1 is now available. Click here to download & learn more! ispLEVER is the flagship design environment for the latest Lattice FPGA products. It is provided on CD-ROM and DVD for Windows, UNIX, or Linux platforms, and can be ordered from your local sales representative or purchased online. ispLEVER is supported by numerous industry leading 3rd party tools, giving you access to the most powerful simulation and synthesis environments available. Every copy of ispLEVER includes Synplify Pro for Lattice from Synplicity. ispLEVER for Windows also includes Active-HDL Lattice Edition from Aldec. ispLEVER for Windows and Linux also include a USB Download Cable. ispLEVER PROispLEVER PRO includes all the features and functionality of the ispLEVER software, and adds the Lattice Lattice IP Value Suite, which includes DDR, DDR2, FIR Filter, FFT and Tri-Speed MAC IP cores. ispLEVER PRO is available via a 1-year subscription license on the Windows platform. ispLEVER Starter
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| ispLEVER Win/UNIX/Linux |
ispLEVER PRO Windows Only |
ispLEVER Starter Windows Only |
ispLEVER Classic Win/UNIX/Linux |
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| Lattice FPGA/CPLD Support | ||||
| LatticeXP2 |  |
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| LatticeECP2M/S | |
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| LatticeECP2 | |
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| LatticeECP2S | |
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| LatticeSC/M | |
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| FreedomChip | |
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| MachXO | |
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| LatticeECP & EC | |
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| LatticeXP | |
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| ispXPGA | |
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| ORCA FPGA | |
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| ORCA FPSC | |
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| ispXPLD 5000MX | |
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| ispMACH 4000B/C/V/Z/ZE | |
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| ispMACH 5000VG |
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| MACH 4A3 / 4A5 |
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| ispLSI2000/5000 | |
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| ispGDX/2 | |
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| ispGAL / GAL | |
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| Software Features - Design Entry | ||||
| Project Navigator (Design management) |
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| Revision Control System | |
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| Schematic Design Entry | Windows Only |
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| Text Editor | |
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| Tcl/Tk Recorder/Editor | |
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| sysDSP Library for MATLAB/Simulink / ispLeverDSP |
Windows: UNIX/Linux: Requires Stand-alone simulator |
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| Block Modular Design for FPGA | |
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| ABEL | |
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| IPexpress (IP and Module configuration) | Windows : UNIX/Linux: Module only |
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| Module/IP Manager (Module configuration) | |
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| Software Features - Simulation | ||||
| Power Calculator | |
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| Static Timing Analyzer / Performance Analyst |
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| Lattice Logic Simulator |
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| HDL/SDF export | |
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| Software Features - Design Assistants |
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| HDL Explorer |
Windows Only | |
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| Constraint/Preference Editor |
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| Design Planner | |
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| IO Assistant |
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| Floorplanner | |
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| ispExplorer | |
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| EPIC Device Editor | |
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ORCA FPGA only |
| Software Features - On-chip Debug |
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| Reveal Logic Analyzer | Windows and Linux Only |
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| ispTRACY Core Generator | |
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ispXPGA only |
| ispTRACY Logic Analyzer | |
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ispXPGA only |
| 3rd Party Software Included |
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| Synplify PRO for Lattice - Synthesis from Synplicity | |
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| Synplify for Lattice - Synthesis from Synplicity | |
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| Active-HDL Lattice Edition - Simulation from Aldec | Windows Only |
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| Active-HDL Lattice Web Edition - Simulation from Aldec | |
Windows Only | ||
| Operating Systems | ||||
| Windows (Vista) |
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| Windows (XP, 2000) | |
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| Linux (Redhat Enterprise v3, v4) |
(Includes Classic Linux) |
Included with ispLEVER purchase only |
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| Linux (Novell SUSE Enterprise v10 SP1) | (Does not include 3rd party tools, Includes Classic Linux) |
Included with ispLEVER purchase only |
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| UNIX (Solaris 2.8, 10) |
(Includes Classic UNIX) |
Included with ispLEVER purchase only |
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| Licensing & Updates | ||||
| License Terms | Perpetual | 1 Year Annual Subscription Extensions available |
6 Months - Renewable | 1 Year - Renewable |
| Node-Locked License | Windows Only |
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| Floating License | Windows: Upgrade Available, see Note 1 UNIX/Linux: |
N/A | N/A | |
| Software Service Packs |
Downloadable |
Downloadable | N/A | N/A |
| Software "New Version" Upgrades | Included with Valid Software Maintenance | Included with Active Software Subscription License |
Downloadable | Downloadable |
ispLEVER is the design software for all Lattice programmable logic products. All variations of ispLEVER include a comprehensive set of powerful tools for all design tasks, including project management, IP integration, design planning, place and route, in-system logic analysis, and more.