MachXO2 devices are designed to offer an unprecedented mix of low cost, low power and high system integration in a single device. Through the use of 65-nm Flash technology and innovative design, MachXO2 devices deliver high system performance, a robust architecture, support for enhanced I/O features, on-chip UFM, hardened I2C, SPI, timer/counter and flexible security features.
The figure below provides an overview of the MachXO2 architecture.
MachXO2-1200
At power-up, data is transferred from the on-chip Flash memory to the SRAM configuration cells that control the operation of the device. This is done within microseconds of the power supplies reaching valid levels providing you with a device that ensures precise control during boot-up.
The on-chip Flash memory in MachXO2 devices stores configuration data, eliminating the need for external boot memory. This provides a high level of security as there is no exposed configuration bit stream, and reduces total board cost as no configuration device is required.
© Lattice Semiconductor Corporation 2012
