The ispMACH 4000ZE CPLD family is ideal for ultra low-power, high-volume portable applications. Based on Lattice’s popular low power ispMACH® 4000Z CPLD family architecture, the second-generation ispMACH 4000ZE offers typical standby current as low as 10µA; ultra-small, space saving 0.4mm pitch Ball Grid Array packages; 3.3V, 2.5V, and 1.8V I/O standards support; and 5-volt tolerant I/Os.
|Typical Standby Current (µA)||10||11||12||13|
|Max User I/O||32||64||96||108|
|Packages1||I/O + Dedicated Inputs|
|48 TQFP (7x7mm, 0.5mm pitch)||32+4||32+4|
|64 csBGA (5x5mm, 0.5mm pitch)||32+4||48+4|
|64 ucBGA (4x4mm, 0.4mm pitch)||48+4|
|100 TQFP (14x14mm, 0.5mm pitch)||64+10||64+10||64+10|
|132 ucBGA (6x6mm, 0.4mm pitch)||96+4|
|144 TQFP (20x20mm, 0.5mm pitch)||96+4||96+14|
|144 csBGA (7x7mm, 0.5mm pitch)||64+10||96+4||108+4|
1 Lead-free packages only
Accelerate your development time with a comprehensive set of popular Reference Designs optimized for the ispMACH 4000 CPLD family.
Development Boards and Kits are available to help you evaluate the ispMACH4000ZE technology, or aid in the development of your own design. Each board includes example designs, schematics and other resources to help you accellerate the evaluation and development process.
Lattice provides several printed circuit board (PCB) layout examples using fine-pitch (0.4 mm and 0.5 mm ball-to-ball center) ball grid array (BGA) packages to assist design and layout. In many cases alternative implementations are provided to illustrate ways to reduce fabrication cost.