Imagine a processor support device that integrates all types of reset generator ICs, voltage supervisor ICs and watchdog timer ICs. That is what you get with the ProcessorPM device.
The ProcessorPM - POWR605 device integrates six precision (0.7%) programmable threshold monitors that can be configured to monitor any supply rail from 0.67V to 5.7V, a 16-macrocell PLD that can be used for generating reset signals and brownout signals and four timers for reset pulse stretching, debouncing reset switches and implementing watchdog timers.
Need a Reliable Watchdog Timer?
A hung processor can corrupt watchdog timer settings. The ProcessorPM - POWR605 provides an external Watchdog timer that's immune to such corruption.
Key Features and Benefits
Low Cost, Single Chip Integration of Supervisor, Reset Generator and Watchdog Timer
Six precision programmable threshold monitors 0.67V to 5.7V
Four programmable timers – no need for additional resistors and capacitors
Five configurable outputs with programmable functions
24-Pin QFNS Package – 16 mm2 area
Power-Down Mode ICC < 10μA
16-macrocell PLD to Integrate Various Logic Functions
Standard solution – Design-specific logic functions required to support a wide range of processors and DSPs
JTAG In-System Programmable
Reduced manufacturing costs
Standard solution – ProcessorPM can be customized to implement supervisory functions specific to any processor or DSP
Reduces risk through programmability
Increases reliability of operation
-40 to +85ºC Operating Range
Can be used across commercial and industrial applications
Wide Supply Range (2.64V to 3.96V)
Watch this 5-minute video to discover how to:
Improve power management accuracy and performance
Integrate multiple discrete ICs and lower cost
Block Diagram for ProcessorPM
ProcessorPM Development Kit
The kit is a versatile, ready to use hardware platform for evaluating and designing with ProcessorPM power management devices. You may extend or modify the pre-configured demo using PAC-Designer software. You can then build your own designs using the free downloadable reference design source code, implementing these features in less than an hour.
© Lattice Semiconductor Corporation 2012
