Article Details

ID: 5680
Case Type: faq
Category: Lattice IP/Reference Design
Related To: IP/Reference Design Inquiries
Family: CrossLink

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Why is Mixel IP datasheet not available? What are CO, CN, CM?

In FPGA-IPUG-02024 which is CSI-2/DSI D-PHY Transmitter Submodule IP, navigate the tcl file for IPcontrol.tcl under C:\LatticeCore\dphy_tx_v1.1\gui\ and check line 131-477 which process the DPHY parameters. This process is bookmarked on a comment line "Set DPHY parameters". The document for Mixel IP core on PLL for Lattice is a propriety and confidential, but this is translated in the tcl file.
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