Article Details

ID: 2263
Case Type: faq
Category: Architecture
Related To: SERDES/PCS
Family: LatticeECP3

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What is the proper use of termination resistors and internal coupling with the Lattice Serdes?

Current Mode Logic (CML) buffers are used as the common interface to the SERDES/PCS. Internal input and output terminations are provided to simplify board level interfacing and AC coupling capacitors are available within the CML receiver. These allow the receiver input termination (50, 75, 2k ohm) and transmitter output termination (50, 75, 5k ohm) to be biased at different levels. These terminations can be updated by the GUI of IPexpress or by changing attributes of CHx_RTERM_TX, CHx_RTERM_RX and PLL_TERM in the source code.

In most applications, you should use AC coupling rather than DC coupling, except when external AC coupling capacitors are used. The usage of TX PLL termination resistors is related to whether 50 ohm termination resistors are or are not used. Termination resistors and their usage are detailed below.

RX I/O termination - for ECP2, ECP3 and ECP5:

  • 50: All non-SMPTE protocols use a 50 ohm termination resistor.
  • 60: provided for flexibility.
  • 75: SMTPE uses a 75 ohm termination resistor.
  • HIGH: such as PCIe RX detection. User does not set this termination.

TX I/O termination - for ECP2, ECP3 and ECP5:

  • 50: All non-SMTPE protocols use a 50 ohm termination resistor.
  • 75: SMTPE uses a 75 ohm termination resistor.
  • 5k: such as PCIe electric idle and RX detection. User does not set this termination value for RX detection.

TX PLL termination - for ECP2 and ECP3:

  • 50: If there is no 50 ohm termination resistor on the PCB.
  • 2k: If there is a 50 ohm termination resistor on the PCB.
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