Lattice sensAI Stack

The following diagrams are examples of how FPGAs are commonly used to power AI/ML solutions. Lattice FPGAs give you a powerful and scalable AI/ML solution that’s simple, low-power and small-footprint. Scroll down to see hardware demonstrations you can download and evaluate today.

Flexible, re-programmable FPGA hardware platforms for evaluation of Lattice demonstrations, and to aid in rapid prototyping of your custom AI/ML solutions.

• Embedded Vision Development Kit (EVDK) – ECP5 FPGA-based modular development platform for AI designs requiring under 1W of power consumption. Flexible interface connectivity boards support MIPI CSI-2, embedded DisplayPort (eDP), HDMI, GigE Vision, USB 3.0 and more.
• Mobile Development Platform – iCE40 UltraPlus FPGA-based platform for AI designs requiring a few mWs of power consumption, offers a variety of on-board image sensors, microphones, compass/pressure/gyro sensors and more.
• Himax HM01B0 UPduino Shield - A complete development kit for implementing Artificial Intelligence (AI) using vision and sound as sensory inputs, with iCE40 UltraPlus FPGA based Upduino 2.0 board and Himax image sensor module.
• DPControl iCEVision board - A vision focused development kit designed by DPControl with iCE40 UltraPlus FPGA and multiple interface connectors compatible with most common camera interfaces.

Neural network accelerator IP cores include support for convolution, pooling and fully connected network layers.

• Convolutional Neural Network (CNN) Accelerator – Fully parameterizable IP core optimized for ECP5 FPGA implementation, includes support for variable quantization for accuracy versus power consumption tradeoffs.
• CNN Compact Accelerator – Optimized for iCE40 UltraPlus FPGA, the accelerator supports the implementation of AI designs that allow a few mWs of power consumption.

The Lattice sensAI solution stack includes the Neural Network Compiler for easy integration of networks developed in TensorFlow,Caffe or Keras into Lattice FPGAs – no prior RTL experience required.

The output of the Neural Network Compiler can then be integrated into the standard Lattice FPGA development tool flows – Lattice Diamond for ECP5, or Radiant for iCE40 UltraPlus, and finally deployed to the FPGA in your system.

• Neural Network Compiler – Rapidly analyze, simulate, and compile various networks for implementation onto Lattice CNN/CNN Compact Accelerator IP cores.

The Lattice sensAI stack includes an ecosystem of select, worldwide design service partners that can deliver custom solutions for a range of end-applications, including mobile, smart home, smart city, smart factory, and smart cars. Click here for more information on Lattice sensAI certified partners.