LatticeMico32 Open, Free 32-Bit Soft Processor

 

Lattice Mico32 LogoThe LatticeMico32™ is a 32-bit Harvard, RISC architecture "soft" microprocessor, available for free with an open IP core licensing agreement. The LatticeMico32 provides the visibility, flexibility and portability that you expect in an open source hardware design. Everything you need is provided, including software development tools (via LatticeMico™ System) and evaluation boards to try out your designs in hardware.

By combining a 32-bit wide instruction set with 32 general purpose registers, the LatticeMico32 provides the performance and flexibility suitable for a wide variety of markets. Using a RISC architecture, the core consumes minimal device resources, while maintaining the performance required for a broad application set. To accelerate the development of microprocessor systems, several optional WISHBONE compatible peripheral components may be integrated with the LatticeMico32.

WISHBONE Compatible Peripheral Components

To accelerate the development of microprocessor systems, several optional WISHBONE compatible peripheral components may be integrated with the LatticeMico32.

  • Memory controllers
    • DDR, DDR2 & DDR3 SDRAM
    • Asynchronous SRAM
    • On-chip Block Memory
    • SDRAM controller
    • On-chip dual port memory
    • SPI Flash
    • Parallel Flash
  • I/O
    • 32-bit Timer
    • DMA Controller
    • GPIO
    • I2C Master Controller
    • SPI
    • Tri-Speed Ethernet MAC
    • UART
    • PCI Target

Three Configurations to Optimize Area and Performance

  • Basic
    • No Multiplier
    • Multicycle Shifter
    • No Cache
  • Standard
    • Multiplier
    • Pipelined Shifter
    • 8K I-Cache, No D-Cache
  • Full
    • Multiplier
    • Pipelined Shifter
    • 8K I-Cache, 8K D-Cache

Development Tools

LatticeMico System is to be used to implement a LatticeMico32 system with attached peripheral components. It is based on the Eclipse C/C++ Development Tools Environment, which is an industry open-source development and application framework for building software.

Supported Development Boards

Lattice has pre-defined a number of its development boards as platforms within the LatticeMico System Software. This allows you to rapidly start developing LatticeMico32 based systems on these boards. The following boards have been developed:

  • LatticeMico32 Development Board for LatticeECP2
  • LatticeMico32 Development Board for LatticeECP

Features

  • Optimized for Lattice FPGA Devices
  • Performance Enhanced Feature Set
    • RISC architecture
    • 32-bit data path and 32-bit instructions
    • 32 general purpose registers
    • Handles up to 32 external interrupts
    • Optional instruction and data caches
    • Dual WISHBONE memory interfaces (Instruction and Data)

Jump to


Block Diagram


Performance and Size

Performance and Resource Utilization1
Lattice FPGA Family Configuration LUTs fMAX (MHz)
LatticeECP3 Standard 2,370 115
LatticeXP2TM Standard 2,406 85
LatticeECP2/M Standard 2,497 110

1Performance and utilization characteristics are generated using Lattice Diamond software. When using the LatticeMico32 in a different density, speed, or grade within the Lattice FPGA family, performance may vary.


Ordering Information

For the latest information of LatticeMico System Development Tools, go to the page located here. This page will always provide the latest release of LatticeMico System software

For information about the LatticeMico32 for other Lattice FPGA families, please contact your local Lattice Sales Office.


Documentation

Quick Reference Information Resources Downloads
  TITLE NUMBER VERSION DATE FORMAT SIZE
LatticeMico Asynchronous SRAM Controller 3.3 3.3 6/16/2015 PDF 338 KB
LatticeMico DMA Controller 3.3 3.3 6/16/2015 PDF 404.2 KB
LatticeMico Dual-Port On-Chip Memory Controller 3.1 3.1 6/16/2015 PDF 738.2 KB
LatticeMico Embedded Function Block 1.6 1.6 6/16/2015 PDF 422.5 KB
LatticeMico GPIO 3.5 3.5 6/16/2015 PDF 316.8 KB
LatticeMico Master Passthrough 3.3 3.3 6/16/2015 PDF 80.2 KB
LatticeMico Memory Passthrough 3.1 3.1 6/16/2015 PDF 80.5 KB
LatticeMico On-Chip Memory Controller 3.4 1/14/2015 PDF 187.8 KB
LatticeMico Parallel Flash Controller 3.2 3.2 6/16/2015 PDF 250.2 KB
LatticeMico SPI 3.1 3.1 6/16/2015 PDF 302.5 KB
LatticeMico SPI Flash 3.7 3.7 6/16/2015 PDF 234.8 KB
LatticeMico Timer 3.1 3.1 6/16/2015 PDF 278 KB
LatticeMico UART 3.8 3.8 6/16/2015
LatticeMico32 Asynchronous SRAM Controller 1.1 11/15/2010 PDF 232.7 KB
  TITLE NUMBER VERSION DATE FORMAT SIZE
LatticeMico32 Migration Concerns Post ispLEVER 8.1 and Diamond 1.0 TN1221 11/5/2010 PDF 404.1 KB
  TITLE NUMBER VERSION DATE FORMAT SIZE
JSP Kernel User Guide 1.6.1 4/14/2008 PDF 302.3 KB
LatticeMico32 HW Developer User Guide 3.5 1.0 6/16/2015 PDF 1.4 MB
LatticeMico32 Processor Reference Manual 2.1 2.1 1/21/2013 PDF 898.8 KB
LatticeMico32 SW Developer User Guide 3.5 1.0 6/16/2015 PDF 5 MB
LatticeMico32 Tri-Speed Ethernet MAC Demo 3/1/2007 PDF 1 MB
LatticeMico32/DSP Development Board for LatticeECP2 Devices User's Guide EB26 2.6 6/4/2009 PDF 1.9 MB
LatticeMico32/DSP Development Board User Guide EB17 01.4 12/15/2008 PDF 2.4 MB
LatticeMico8 Processor Reference Manual 2.1 2.1 1/21/2013 PDF 572.2 KB
  TITLE NUMBER VERSION DATE FORMAT SIZE
Lattice Diamond Software Product Brief I0207G 1.0 6/16/2015 PDF 2.1 MB
LatticeMico32 Product Brief I0186 7/10/2012 PDF 1.2 MB
  TITLE NUMBER VERSION DATE FORMAT SIZE
LatticeMico32 Tutorial 1.4 12/12/1401 PDF 1.5 MB
  TITLE NUMBER VERSION DATE FORMAT SIZE
The Challenges of Automotive Vision Systems Design 4/1/2007 PDF 341.5 KB
  TITLE NUMBER VERSION DATE FORMAT SIZE
LatticeMico32 DDR SDRAM Demo 2/27/2009 ZIP 13.8 MB
LatticeMico32 Gigabit Ethernet MAC Demo 10/25/2007 ZIP 19.6 MB
LatticeMico32 Tri-Speed Ethernet MAC Demo 7.1SP1 10/15/2008 ZIP 13.8 MB