Lattce Propel Version History

History

Lattice Propel 1.1

  • New Device Family Support
    • Lattice CrossLink™-NX
    • Lattice Certus™-NX
  • Lattice Propel SDK
    • Supports cable port and device detection and selection during on-chip debug.
    • Supports creating C project for SoC project with multiple memory regions.
    • Supports importing Lattice System on Chip (SoC) projects into workspace.
    • Adds synchronizing C project with SoC project.
    • Adds Lattice Diamond, Lattice Radiant, and Propel Builder bridges.
    • Adds directory settings for Lattice Diamond /Lattice Radiant location.
    • Supports peripherals view with register description during debug session.
    • Supports hardware description language syntax highlighting.
  • Lattice Propel Builder
    • Adds standalone Propel Builder icon to the start menu and the desktop.
    • Supports creating SoC project and SoC verification in project wizard Graphic User Interface.
    • Adds Lattice Diamond, Lattice Radiant, and Propel SDK bridges.
    • Adds directory settings for user IP/Lattice Diamond/Lattice Radiant/Questasim location.
    • Generates simulation environment, testbench, and script.
    • Integrates OEM ModelSim.
  • Template Design and System Simulation
    • Provides CrossLink-NX template design, the HelloWorld Project.
    • Provides Certus-NX template design, the HelloWorld Project.
    • Supports functional verification using system-level simulation environment for templates.

Propel1

  • Platform
    • Supports Lattice MachXO3D platform.
  • Processor and IPs
    • Supports RISC-V MC processor IP with RV32I & Zicsr ISA.
    • Encapsulates Timer and Programmer Interrupt Controller (PIC) in the processor IP.
    • Supports GNU Project Debugger (GDB) debug through JTAG port.
    • Supports foundation IPs for system bus (AHB-Lite, APB), system memory,and configuration of Embedded Functional Block (EFB) of MachXO3Ddevice.
    • Provides Board Support Package(BSP)support for RISC-V and foundation IPs.
  • Propel Builder
    • Implements a desired system simply with drag-and-drop instantiation and wizard-guided configuration and parameterization.
    • Automates the task of integrating IP components.
    • Supports downloadable IP from IP catalog.
  • Propel SDK
    • Built-in industry standard components and tools for software development and debugging.
    • Optimized project management flow for Lattice FPGA platform.
    • Integrates GDB and Open On-Chip-Debugging (OCD)with chained JTAG.
  • Template Design and System Simulation
    • Provides template design, the HelloWorld project.
    • Supports functional verification using system-level simulation environment for templates.
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