#=============================================================================
# Utils: sub-makefile
#
# This makefile is used to build a collection of source files into a 
# relocatable object file that can be linked together with the application
# to create a runnable program.
#
# The default compiler rules are used to build the .c files into .o files
# Specific build tools and options are provided by overriding the defaults
# with the variables included by rules.make
# Project specifics can be added to the platform rules if needed.
#
# needs environment variable PLATFORM_DIR to find rules.make
# uses definitions in rules.make for actual building
#=============================================================================
                                                                                
# Define the end goal of the make
TARGET := Version.obj

# Define the project source files to be compiled (objs automatically created)
SRC := Version.cpp


# Use the build rule of this platform
include $(PLATFORM_DIR)/rules.make
                                                                                
                                                                                
# Add any additional rules this project needs
INCLUDE_PATH := $(INCLUDE_PATH) -I.
CFLAGS := $(CFLAGS) $(OPTIONS) $(INCLUDE_PATH)
CXXFLAGS := $(CXXFLAGS) $(OPTIONS) $(INCLUDE_PATH)
                                                                                

#-----------------------------------------
# The goal of the makefile
#-----------------------------------------
$(TARGET) : $(OBJS) .depends
	$(LD) $(LDFLAGS) $(OBJS) -o  $(TARGET)

.PHONY : clean
clean:
	-rm $(OBJS)
	-rm $(TARGET)

# Generate the dependencies automatically
.PHONY : depends
depends:
	$(CC) -MM $(CXXFLAGS) $(SRC) > .depends

.depends: Makefile
	$(CC) -MM $(CXXFLAGS) $(SRC) > .depends

include .depends
