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The event was originally broadcast on:
Date: Wednesday, October 17, 2007
Time: 9:00 AM Pacific / 12:00 PM Eastern
Duration: 1 hour
Overview
You may have a legacy design that is still in production and is manufactured with components, including microprocessors, that are being end-of-life'd by the supplier. Or you may have a legacy design that you want to cost reduce, and integrate the processor with surrounding peripherals without incurring the high NRE cost of ASIC development. Microprocessors used in these situations are often venerable 8 or 16 bit architectures like the 8051, 68xx, or Z80. Moving to another processor with a different instruction set architecture (ISA) is unacceptable since it introduces too much cost and risk. Lattice Semiconductor and Digital Core Design present an ideal solution to these problems. We give you a migration path for your design that will let you retain ISA compatibility and integrate your design into a smaller footprint.
Speaker Information
 John Swan |
John Swan
IP Product Marketing Manager
Lattice Semiconductor
John Swan is IP Product Marketing Manager at Lattice Semiconductor. Before coming to Lattice John had 20 years of experience at Motorola Corporate Labs in SoC design and design methodology. Experience additionally include marketing and sales as SoC Consulting Manager at Mentor Graphics and at SwanOnChips. John received a BSEE in Computer Engineering, Magna Cum Laude, from the Illinois Institute of Technology and an MBA from Roosevelt University.
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 Tomek Krzyzak |
Tomek Krzyzak
President
Digital Core Design
Tomek Krzyzak is a co-founder and Vice President of Digital Core Design. Krzyzak has more than 10 years of experience in the FPGA and ASIC industries, and holds an MSEE degree from Silesian University of Technology. |
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