MachXO: The New Low-Cost, Low-Power Alternative to CPLDs and FPGAs

The original event was broadcast on: Wednesday, August 10, 2005

Designers often turn to small FPGAs or large CPLDs for many types of glue logic functions, such as bus bridging, interfacing and control. Lattice's new non-volatile MachXO family combines the best of CPLDs and FPGAs on a single chip, making it ideal for applications requiring high pin-to-pin speed, low power, on-chip memory, or "instant-on" operation.

Attend this webcast and learn how to design with an alternative programmable logic solution that is:

• Low cost
• High performance
• Low power
• Secure
• Easy