Low Cost FPGAs Deliver Design Encryption, DDR and DSP for $0.50 per 1000 LUTs

The event was originally broadcast on:

Date: Wednesday, March 22, 2006
Time: 11:00 AM Pacific / 2:00 PM Eastern
Duration: 1 hour

Overview

Our latest generation low-cost, 90nm FPGA family, the LatticeECP2 delivers some features typically exclusive to high-end FPGAs at costs around $0.50 per 1K LUT in volume. The new Lattice chips contain built-in non-volatile encryption security, a flexible and easy-to-use DDR memory interface, supporting 400Mbps DDR1/2 memories, and advanced DSP blocks. Attend this webcast and learn how to design with the latest low-cost FPGA solution, the LatticeECP2.

Drawing

• One participant who attends the live broadcast and fills out the feedback form will receive an ispLEVER Development Tool for Lattice FPGA and CPLD design and a LatticeECP2 evaluation board. Official Rules.

The Webcast will be moderated by Bill Wong, Editor for Electronic Design