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LATTICE DELIVERS INDUSTRY'S FASTEST RLDRAM I/II MEMORY CONTROLLER SUPPORT–LatticeSC and LatticeSCM FPGA Families Now Support RLDRAM I/II Rates up to 800Mbps–HILLSBORO, OR - SEPTEMBER 15, 2008 - Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced industry-leading FPGA-based support for the Reduced Latency Dynamic Random Access Memory (RLDRAM®) I/II memory devices. The LatticeSC™ and LatticeSCM™ FPGA families (collectively, the “LatticeSC/M” families) now support RLDRAM I/II rates up to 800Mbps. The high-speed RLDRAM I and RLDRAM II memory controller IP (intellectual property) is implemented in Lattice’s unique, low power MACO™ (Masked Array for Cost Optimization) structured ASIC technology. “We are pleased to announce the release of our industry-leading RLDRAM I/II memory controller IP,” said Chris Fanning, Lattice corporate vice president, enterprise solutions and marketing. “The high-speed RLDRAM I/II memory controllers round out our high performance embedded memory controllers portfolio, implemented using the low-power, high performance MACO technology in the LatticeSCM family. The RLDRAM I/II controllers provide our customers with the industry’s fastest programmable interface to Micron’s next generation RLDRAM I/II memory devices. The LatticeSCM MACO memory controllers are a low risk, proven solution that delivers a higher level of performance than other FPGA solutions, while also reducing time to market for our users: another example of Lattice's ‘More of the Best’ approach.” About the LatticeSC/M FPGA FamilyThe Extreme Performance™ LatticeSC family is designed to provide the unsurpassed performance and connectivity that is essential for high-speed applications. Fabricated on Fujitsu’s 90nm CMOS process technology utilizing 300mm wafers, LatticeSC FPGAs are packed with features that accelerate chip-to-chip, chip-to-memory, high-speed serial, backplane and network data path connectivity. Integrated into the LatticeSC devices are high-channel count SERDES blocks supporting 3.8Gbps data rates, PURESPEED™ parallel I/O providing industry-leading 2Gbps speed, innovative clock management structures, FPGA logic operating at 500MHz and massive amounts of block RAM. Lattice’s unique Masked Array for Cost Optimization (MACO) embedded structured ASIC blocks also are available on the LatticeSCM devices, delivering pre-engineered, standard-compliant IP functions such as high-speed Memory Controllers, SPI4.2, Ethernet MACs, and PCI Express control functions developed by Lattice to shorten end-system time to market. About MACO TechnologyLattice’s unique Masked Array for Cost Optimization (MACO) embedded structured ASIC blocks are available on LatticeSCM FPGA devices and deliver pre-engineered, standard-compliant IP functions developed by Lattice to shorten end-system time to market. Unlike the soft IP cores commonly used with FPGAs, the MACO IP functions are embedded into the devices, and there is no distinct IP license fee associated with their use. These enhanced memory controllers provide the industry’s fastest programmable memory interfaces supporting next generation RLDRAM I/II memory devices, as well as DDR I/II and QDR II/II+ memory devices. Lattice’s ispLEVER® version 7.1 software design tool suite supports a complete HDL-based design and verification flow for LatticeSCM devices, as well as other Lattice leading-edge programmable device families. About Lattice SemiconductorLattice Semiconductor Corporation provides the industry's broadest range of Programmable Logic Devices (PLD), including Field Programmable Gate Arrays ( FPGA), Complex Programmable Logic Devices (CPLD), Mixed-Signal Power Management and Clock Generation Devices, and industry-leading SERDES products. Lattice continues to deliver "More of the Best" to its customers with comprehensive solutions for system design, including an unequaled portfolio of high-performance, non-volatile, and low-cost FPGAs. Lattice products are sold worldwide through an extensive network of independent sales representatives and distributors, primarily to OEM customers in communications, computing, industrial, consumer, automotive, medical and military end markets. For more information, visit http://www.latticesemi.com. Statements in this news release looking forward in time are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Investors are cautioned that forward-looking statements involve risks and uncertainties including market acceptance and demand for our new products, our dependencies on our third party software suppliers, the impact of competitive products and pricing, technological and product development risks and other risk factors detailed in the Company’s Securities and Exchange Commission filings. Actual results may differ materially from forward-looking statements. # # # Lattice Semiconductor Corporation, Lattice (& design), L (& design), LatticeSC, LatticeSCM, Extreme Performance, PURESPEED, ispLEVER, MACO and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries. RLDRAM is a trademark of Infineon Technologies AG in various countries, and is used by Micron Technology, Inc. under license from Infineon. All other trademarks are the property of their respective owners. GENERAL NOTICE: Other product names used in this publication are for identification purposes only and may be trademarks of their respective holders. For more information contact: |