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News Release

Lattice to Preview Easy DDR Memory Interface Design in Low-Cost FPGAs

July 28 NetSeminar features new Lattice low-cost FPGAs

HILLSBORO, OR - July 26, 2004 - Lattice Semiconductor Corporation (NASDAQ: LSCC) will conduct a net seminar on the easy design of DDR memory interfaces in FPGAs. More and more systems are taking advantage of economical double data rate (DDR) memories, but DDR memory interface design can be tricky, particularly at 200DDR (100MHz) speeds and higher. The new LatticeECP™ and LatticeEC™ low-cost FPGAs provide unique pre-engineered DDR memory interface solutions that are easy and reliable. Attendees will learn how to design DDR interfaces that are high-performance, accurate, reliable, voltage- and temperature-compensated and pre-engineered. Those attending the net seminar live who complete the post-presentation survey will be entered in a drawing for an ispLEVER� Development Tool for Lattice FPGA and CPLD design ($995 USD value).

Speaker: Bertrand Leigh, Applications Engineering Manager, Lattice Semiconductor
When: Wednesday, July 28, 2004 at 10:00 a.m. PDT
Where: Online Net Seminar

To register for the seminar, please visit http://www.latticesemi.com/events/on24_ecp_seminar/index.cfm

Statements in this news release looking forward in time are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Investors are cautioned that forward-looking statements involve risks and uncertainties including market acceptance and demand for our new products, our dependencies on our silicon wafer and intellectual property suppliers, the impact of competitive products and pricing, technological and product development risks and other risk factors detailed in the Company's Securities and Exchange Commission filings. Actual results may differ materially from forward-looking statements.

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Lattice Semiconductor Corporation, Lattice (& design), L (& design), LatticeECP, LatticeEC, ispLEVER, and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries.

GENERAL NOTICE: Other product names used in this publication are for identification purposes only and may be trademarks of their respective holders.

For more information contact:

Brian Kiernan, Corporate Communications Manager
Lattice Semiconductor Corporation
brian.kiernan@latticesemi.com
voice: (503) 268-8739
fax: (503) 268-8193