Lattice Semiconductor Supports New Synthesis Tool from Mentor Graphics

HILLSBORO, Ore., - March 4, 2002 - Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced its support of the new Mentor Graphics Precision� Synthesis environment. Precision Synthesis will be integrated with design tools supporting Lattice's ORCA FPGA and Field Programmable System Chip (FPSC) families and SuperBIG^TM, SuperFAST^TM and SuperWIDE^TM (BFW) In-System Programmable (ISP�) device architectures.

"Lattice continues to deliver innovative solutions for ISP device design," said Stan Kopec, vice president of corporate marketing at Lattice. "Through our latest generation BFW products, the ispMACH^TM 4000 and ispMACH 5000 families, Lattice has optimized its CPLD architectures to meet a variety of design challenges. Mentor Graphics has taken this same approach with Precision Synthesis by creating a synthesis platform designed to take full advantage of the target architecture. The intuitive interface of the Precision Synthesis tool and its unique approach to synthesis allows users to take full advantage of Lattice's device features without the need to become power users."

Precision Synthesis addresses the challenges of current and next-generation FPGA, CPLD, and ispGDX (Generic Digital Switch) devices. It features an intuitive graphical user interface, a new suite of optimization algorithms and a state-of-the-art timing engine that delivers the industry's most accurate timing analysis, enabling Lattice developers to maximize performance by achieving the highest quality of results.

"The challenges of next-generation programmable logic design require closer partnerships between device vendors and the EDA community," said Anne Sanquini, vice president and general manager of the HDL Design division at Mentor Graphics. "Mentor Graphics has worked closely with Lattice to ensure our tools address the complex requirements of both design creation and verification. Precision Synthesis is the centerpiece to a programmable logic strategy that enables rapid time-to-productivity for our mutual customers."

Lattice, the inventor of In-System Programmability, holds a dominant position in the 3.3V CPLD market with its extensive portfolio of innovative SpeedLOCKED^TM, SuperBIG, SuperFAST, and SuperWIDE ISP architectures. The recent addition of ORCA FPGA and FPSC products gives Lattice a full range of powerful programmable solutions. The Precision Synthesis software, supporting the complete line of Lattice digital devices, is tightly integrated with Mentor Graphics tools to supply powerful out-of-the-box solutions for every design need.

Availability
Precision Synthesis is currently in beta release and will be available to all customers in Q2 2002. The tool runs on Windows NT, 98, 2000 and XP, Solaris and HP-UX platforms. Precision Synthesis will be provided as a replacement technology for LeonardoSpectrum^TM level three customers. For LeonardoSpectrum Lattice version, LeonardoSpectrum level two and FPGA Advantage Personal Edition users, Mentor Graphics will continue to offer ongoing device support and continued software releases to these products, with an option to upgrade to Precision Synthesis if desired. For more information please call 1-800-632-3742 or visit http://www.mentor.com/synthesis/.

About Lattice Semiconductor
Oregon-based Lattice Semiconductor Corporation designs, develops and markets the broadest range of high-performance ISP programmable logic devices (PLDs) and offers total solutions for today's advanced logic designs. Lattice introduced in-system programmable CPLDs to the logic industry in 1992.

Lattice products are sold worldwide through an extensive network of independent sales representatives and distributors, primarily to OEM customers in the fields of communications, computing, computer peripherals, instrumentation, industrial controls and military systems. Company headquarters are located at 5555 NE Moore Court, Hillsboro, Oregon 97124 USA; Telephone 503-268-8000, FAX 503-268-8037. For more information on Lattice Semiconductor Corporation, access our World Wide Web site at http://www.latticesemi.com.

Statements in this news release looking forward in time are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Investors are cautioned that forward-looking statements involve risks and uncertainties including acceptance and demand for our new products, our dependencies on our suppliers, the impact of competitive products and pricing, technological and product development risks and other risk factors detailed in the Company's Securities and Exchange Commission filings. Actual results may differ materially from forward-looking statements.

Lattice Semiconductor Corporation, Lattice (& design), L (& design), LSC, ISP, in-system programmable, ispGDX, ispMACH, ORCA, SpeedLOCKED, SuperBIG, SuperFAST, SuperWIDE, and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation. Mentor Graphics, FPGA Advantage, LeonardoSpectrum, and Precision Synthesis are either registered trademarks or trademarks of Mentor Graphics Corporation.

For more information contact:

Tim Schnettler
Lattice Semiconductor Corporation
tim.schnettler@latticesemi.com
(503) 268-8589