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Lattice Semiconductor Releases ispMACH 4A Family Of 3.3- and 5-Volt CPLDs
HILLSBORO, OR - APRIL 3, 2000 - Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced the production release of the ispMACH 4A family of high performance, low cost, in-system programmable (ISPTM) Complex Programmable Logic Devices (CPLDs). The ispMACH 4A family, manufactured on Lattice's advanced 0.25 micron (Leff) E2CMOS� technology, delivers eight logic density options from 32 to 512 macrocells with up to 5ns (Tpd) / 182 MHz (Fmax) SpeedLockedTM performance. The new products, which consume the lowest power of any high performance 3.3V or 5V CPLDs, are also priced very attractively, with prices as low as $1.00 for a 32 macrocell device. "The ispMACH 4A family represents the first family introduced by Lattice and Vantis as a unified company and combines the strengths of Lattice's ISP technology with Vantis' advanced MACH� architecture. It is the most comprehensive set of optimized programmable logic solutions available today, providing the most density and I/O options in the marketplace," said Steve Stark, Lattice's Director of Component Marketing. "Using our industry-leading E2CMOS technology, we've been able to achieve die sizes 20% smaller than competitive devices. With pin-to-pin performance (Tpd) as fast as 5.0ns and prices as low as 3 cents per macrocell, the ispMACH 4A family delivers industry-leading performance and value." Architecture The ispMACH 4A devices feature a SpeedLocking architecture that provides speed performance as fast as 5ns Tpd with up to 20 product terms per output independent of routing and product term usage. SpeedLocking delivers the fastest in-system PLD performance available without requiring time-consuming manual design optimization. In addition, the devices also feature a programmable speed/power feature that allows power consumption to be reduced by approximately 50 percent on logic paths that do not require the fastest possible switching speeds. Packaging Options The ispMACH 4A family is ideal for seamless integration into a wide variety of system environments. It provides many features to support system integration: 3.3-Volt support at all densities and 5-Volt support on selected densities; mixed voltage support with 3.3-Volt safety and 5-Volt tolerance; hot-socketing for board-edge and multiple power supply applications; programmable pull-up or Bus-FriendlyTM inputs and I/Os to hold inputs in known states; and, JTAG in-system programmability and test for rapid prototyping and efficient manufacturing. Software Support Pricing and Availability
Remaining members of the ispMACH 4A family will be released by mid-year. Pricing for the M4A3-32, 64, 128 and 256 devices is as low as $1.00, $1.95, $7.75, and $17.75, respectively, at any volume. About Lattice Semiconductor Oregon-based Lattice Semiconductor Corporation designs, develops and markets the broadest range of high-performance ISPTM programmable logic devices (PLDs) and offers total solutions for today's advanced logic designs. Lattice introduced in-system programmability to the logic industry in 1992. In June 1999, Lattice acquired Vantis, the corporation that invented the PAL� device and PLD switch matrix architecture, from AMD. With nearly double the R&D and sales resources, the resulting integrated company will focus on delivering logic products that satisfy the performance, density and ease-of-use requirements of its customers. Lattice products are sold worldwide through an extensive network of independent sales representatives and distributors, primarily to OEM customers in the fields of communications, computing, computer peripherals, instrumentation, industrial controls and military systems. Company headquarters are located at 5555 NE Moore Court, Hillsboro, Oregon 97124 USA; Telephone 503-268-8000, FAX 503-268-8037. For more information on Lattice Semiconductor Corporation, access our World Wide Web sites at http://www.latticesemi.com. Statements in this news release looking forward in time are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Investors are cautioned that forward-looking statements involve risks and uncertainties, including the effect of changing economic conditions, the effect of overall semiconductor market conditions, product demand risks, risks associated with dependencies on silicon wafer suppliers and semiconductor assemblers, the impact of competitive products and pricing, technological and product development risks and other risk factors detailed in the Company's Securities and Exchange Commission filings. Actual results may differ materially from forward-looking statements. # # # Lattice Semiconductor, L (stylized) Lattice, Vantis, theVantis logo, PAL, E2CMOS, ISP, ispMACH, MACH, MACH4, ispMACH4A, ispJTAG, ispLSI, ispVM and ispDesignEXPERT are either registered trademarks or trademarks of Lattice Semiconductor Corporation and Vantis Corporation in the United States and/or other countries. For more information contact: Evelyn Leos, PR Manager |