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LatticeNEWS September 2010

Reference Design Portfolio Expanded for Popular MachXO and ispMACH 4000ZE PLDs

More than 90 reference designs simplify the design process and accelerate time-to-market for a broad range of applications.

Lattice has released more than 90 reference designs optimized for the MachXO and ispMACH 4000ZE PLDs. Reference designs enable the quick and efficient design and deployment of commonly used functions such as a general purpose I/O expander, I2C bus master/slave, LCD controller and SD Flash controller, as well as other interfaces, in a variety of markets including consumer, communications, computing, industrial and medical. The reference designs, coupled with complete documentation and design source code, are fully customizable and enable designers to reduce design time, boost productivity and accelerate time-to-market.

Test Within Minutes and Implement Designs in Less Than an Hour

Reference designs provide a great starting point for designers to begin prototyping their designs. Each reference design consists of comprehensive documentation along with HDL source code (Verilog and/or VHDL) and test benches, many of which have been pre-implemented and validated using Lattice's low-cost development kits.

Reference designs optimized for control applications, including I/O expansion, interface bridging, level translation and power-up sequencing using the MachXO family, have been validated using the  MachXO Mini Development Kit, an easy-to-use, low-cost platform that accelerates the evaluation of MachXO PLDs. Using the preloaded mini system-on-chip (mini SoC) design provided with the development kit, designers can test within minutes I2C, SPI and UART interfaces in addition to the 8-bit LatticeMico8 microcontroller and low power sleep mode functionality. Designers can rebuild these demonstration designs using the free downloadable reference design source codes in less than one hour. This provides a known good starting point for their own design explorations.

Alternatively, designers targeting low power applications can use reference designs optimized for the ispMACH 4000ZE family that have been fully tested and verified using the  ispMACH 4000ZE Pico Development Kit, a battery-powered, low-cost platform to accelerate the evaluation of ispMACH 4000ZE CPLDs. Using the preloaded ispMACH 4000ZE Pico Power demo design provided with the development kit, designers can test I2C master and LCD controller interfaces in addition to the embedded ispMACH 4000ZE oscillator timer, then build their own designs using the free downloadable reference design source code.

Availability

Lattice's entire portfolio of reference designs optimized for the MachXO and ispMACH 4000ZE families can be downloaded for free from the Reference Designs page of the Lattice web site.

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