October 2009

New LatticeECP3 Evaluation Board For SERDES Applications

The LatticeECP3 Serial Protocol Board allow designers to investigate and experiment with the features of the LatticeECP3 high-speed SERDES transceivers.

Lattice recently introduced a new printed circuit board for evaluation, demonstration and development with the low-power, SERDES-capable LatticeECP3 FPGA family. Whether you’re interested in learning more about the performance of the LatticeECP3 devices, or if you're in the middle of completing your own solution, this new board can help you achieve your goals.

The LatticeECP3 Serial Protocol Board allows designers to investigate and experiment with the features of the LatticeECP3 high-speed SERDES transceivers and enables rapid-prototyping and testing of their designs. It is available for full and detailed characterization of the high-speed I/O channels and includes interfaces for some of the latest protocol interconnections.

At the heart of the board is a LatticeECP3-95 FPGA in an 1156-ball fpBGA package. The board is an enhanced form-factor of the PCI Express add-in card specification with x4 card edge fingers, and also has SMAs to analyze SERDES signal integrity, hook up to proprietary systems and allow for serial protocol interoperation. Other features include DDR2 and DDR3 memory components for microprocessor and general-purpose applications, switches, LEDs and displays for demos. The board has several debugging and analyzing features for complete evaluation of the LatticeECP3 device. Lattice also provides complete IP, reference design and firmware packages for SERDES signal integrity testing as well as PCI Express evaluation.

LatticeECP3 Serial Protocol Board

To Learn More

This board provides a convenient reference point for developing your solution with the LatticeECP3 FPGA family. Visit the Lattice website or contact your local Lattice sales representative for additional information about this and other Lattice evaluation boards.