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LatticeNEWS November 2009


affarii logo"digitalTRX" RRH Solution from Lattice and Affarii Lowers Cost and Power

Wireless operators are increasingly challenged to support a diverse set of technology standards and increased customer bandwidth driven by growth in data services. At the same time, they are increasingly pressured to lower capital and operational costs of the networks that will deliver both new and existing services. This has resulted in the move towards a Distributed Base Station Architecture where multiple Remote Radio Heads (RRH) mounted on antennas are connected to a single base station unit using high-speed optical links thereby lowering deployment costs while allowing for flexible upgrades.

Affarii wireless system RRH

Traditionally, near antenna logic for MIMO-based RRH systems has been implemented in high-end, premium FPGAs. The high cost and power dissipation of these high-end FPGAs has forced vendors to sacrifice design flexibility and attempt expensive ASIC conversions. Lattice and Affarii Technologies Limited have developed a complete 3G/4G-based Remote RRH solution for wireless infrastructure designers. This is the first time that a full RRH solution has been made available using the low-power, low-cost LatticeECP3 FPGAs that allows low-power RRHs to be deployed without sacrificing flexibility or performance.

 

RRH Block Diagram

 

A Fully Integrated Solution

Affarii’s unique digitalTRX™ technology provides vendors an unprecedented RRH solution that includes:

  • Digital Up/Down Converters (DUC/DDC) are widely used in communication systems for scaling the sample rate of signals. Digital up conversion is required when a signal is translated from baseband to intermediate frequency (IF) band. Digital down conversion happens when a signal is converted from intermediate frequency band to baseband.
  • Crest Factor Reduction (CFR) is a key component in modern digital amplifier and linearization systems. Using active control of transmit signal error vector magnitude (EVM), Crest Factor Reduction can significantly reduce waveform peak to average power ratio (PAPR), while maintaining spectral purity and improving amplifier linearity, efficiency and cost.

 

RRH Graphs 1 

  • Digital Pre-Distortion (DPD) has become the industry standard for linearity improvement in digital amplifier designs. By measuring transmitter non-linearity and applying an inverse function to the digital modulator output, digital pre-distortion provides automated real time correction of transmitter non-linearity, improving amplifier linearity, efficiency and cost.

 

RRH Graphs 2

This solution supports the integration of all RRH processing into a single mid-range, low-power, low-cost LatticeECP3 FPGA device. Additionally, Lattice provides low latency CPRI/OBSAI and Ethernet technology implemented on the LatticeECP3 FPGA's low-cost 3.2G SERDES transceivers. The solution also delivers the lowest dynamic power for a programmable logic DPD solution at 400mW per antenna. This makes it ideal for various wireless applications including:

  • WCDMA
  • LTE
  • WiMAX/WiBro
  • TD-SCDMA
  • DVB-T/S/H

The RRH solution is supported by a comprehensive development and test environment that includes GUI-based design simulation, performance analysis, and production test API with design examples. An in-circuit hardware development platform is also being developed. The RRH solution is available for demonstration by arrangement with Affarii.

To Learn More

To learn more about this solution, visit the Lattice web site.