November 2009

New ispLEVER 8.0 FPGA Software Boosts Design Performance

Lattice has released ispLEVER 8.0, with a major update to the support of the LatticeECP3 FPGA family as well as powerful enhancements to the LatticeMico32 based solution. An updated version of Synopsys® Synplify Pro® for Lattice (C-2009.03L-1) and Aldec® Active-HDL™ Lattice Edition (8.2) are included in ispLEVER 8.0. 

Key features of ispLEVER 8.0 include:

• Updated support of LatticeECP3 Family for Generic DDR Interfaces
  • Additional supported generic DDR interfaces allows more implementation choices, including in some cases, the support of more interfaces per device. 
  • HDL Generation from IPexpress GUI tool of the user-defined generic DDR interface configuration (DDR_GENERIC). Among the many benefits:
    • Chooses the most appropriate interface based on requirements such as number of interfaces, interface width and speed.
    • Avoids errors from hand coding complex interfaces.
    • Allows much more convenient use of the DQS grouping structure for pins which aids pin layout work.
  • Enhanced support of the LatticeECP3 "EA" devices. This release allows access to additional capability that "EA" devices have for generic DDR interfaces.
  • Enhanced static timing analysis of generic DDR interfaces. The clock domain crossing analysis within generic DDR is now automatically included in Trace’s new Timing Rule Check section. User does not need to add explicit timing constraints for this analysis.
• Updated Support of LatticeECP3 Family for DDR Memory Interfaces
  • Enhanced DDR memory interface HDL generation from IPexpress GUI tool. Now capable of also building the PHY portion of the DDR memory interface (e.g. clock/address/command, data mask).
• IPexpress
  • In addition to the numerous enhancements for Generic DDR and DDR Memory interface generation, IPexpress also contains improvements to other modules. The PCS module has been enhanced so Trace analysis will automatically be done on clocks originating from the PCS block (no need for user to set these FREQUENCY preferences).
• ispLeverDSP MATLAB/Simulink
  • (Available only in the Windows version.) A new block, the Lattice Cascaded Integrator-Comb (CIC) Filter IP core, is now available in ispLeverDSP blockset. See the DSP Guide for FPGAs for detailed description.
• ispVM System
  • The ispVM System software has been upgraded to version 17.6. New features and enhancements include:
    
    • The Monitor Download Cable Connection command in the Options menu. Enabling this command allows the software to check download cable connection and indicate the change when the cable is disconnected or the board power is turned off.
    • Added support for Lattice FTDI USB2 download cable. To use the cable, you must install the FTDI Windows USB driver. See Installing/Uninstalling Parallel Port Driver and USB Driver in the ispVM System Help.
    • Improved automatic cable detection. You can now use Auto Detect to list all the cables connected to your computer and then select one from the list. See Using Auto Detection in the ispVM System Help for more information.
• LatticeMico32 Solution Enhancements (Available only in Windows and Linux Versions)
  
  • New Dual-Port On-Chip Memory Controller component
  • New UART feature, emulating C/C++ "printf"
  • New SPI Flash Controller with read/write support (replacing the SPI Flash ROM with read-only support)
  • Tri-Speed Ethernet MAC (TSMAC) IP upgraded to enable higher system throughput. Now has dual WISHBONE Slave Ports and Burst Read/Write Support for RX/TX FIFOs. 
  • LatticeMico32 GNU Compiler Toolchain upgraded to version 4.3.0 for software performance improvement.
  • Tutorial updated to target LatticeECP2.
• Simulation and Synthesis Tools
  • (Windows version) The Aldec® Active-HDL™ Lattice Edition simulator has been updated to version 8.2.
  • (Windows version) The Synopsys® Synplify® and Synplify Pro® for Lattice synthesis tools have been updated.  Synplify Pro release C-2009.03L-1 provides beta support of compile points for LatticeECP/EC, LatticeECP2/M, LatticeECP3, MachXO, LatticeSC/M, LatticeXP, and LatticeXP2. This beta level support has been included with the intent to allow users to become familiar with using compile points for incremental synthesis.  It is not recommended for production designs. More information on this feature is available in the Synplify Pro release notes and user guide.
• Linux Support Upgraded to Red Hat Enterprise Linux (RHEL) 5.3.
  • The tool suite now supports Linux 5:

  ispLEVER Linux Support

  	RHEL3		RHEL4		RHEL5
  	32	64*	32	64*	32	64*
  ispLEVER
  ispVM
  LatticeMico32
  System

  Note: 64-bit support refers to running 32 bit binaries on a 64-bit machine.

  To Learn More

  To learn more about ispLEVER 8.0, visit the Lattice website,  or contact your local Lattice sales representative.