May 2008

Lattice Listens

Q: Lattice recently introduced the ispMACH 4000ZE CPLD family. What feature enhancements have been made?  

A: Lattice designed the second-generation ispMACH 4000ZE, ultra low-power CPLD family to support all the capabilities of the first generation ispMACH 4000Z family, with the following additional features:

• Ultra-low power supports standby power in the uA range
• Board-space-saving 0.5 mm fine-pitch BGA packages
• Input pin Power Guard lets the user control the dynamic power of the device
• Internal oscillator and timer that can generate an internal clock for housekeeping functions such as watchdog heartbeats, digital de-glitch circuits and control state machines

The most significant benefit is the power savings possible with the new input pin Power Guard option. This feature allows designers to dynamically turn off any logic blocks that are not actively being used in the system. 

The ispMACH 4000ZE family is supported by the ispLEVER Classic design tool version 1.1.

To Learn More

For further information on the new ispMACH 4000ZE CPLD family, visit the Lattice website or contact your local Lattice sales representative.