March 2008

Lattice Listens

Q: Lattice recently released version 3.0 of the LatticeMico8 soft microprocessor. What features have been added and how do they improve on the previous release of the LatticeMico8?  

A: The LatticeMico8 soft microprocessor is improved over the preceeding version (v.2.4) in several areas. These changes make using the microprocessor easier and more enjoyable. They increase the kinds of applications the microprocessor can manage and permit improvements in the structure of the assembly source code. For a more detailed discussion of these changes, click here.

Changes include:

• Easier to migrate between Lattice FPGA families
• Program memory store increased to permit greater than 512 opcodes
• Unconditional Branch and Call instructions increased to the +2047/-2048 range
• Scratch pad memory is external only
• All memory access cycles are 3 clock cycles long instead of 2
• The v.3.0 core adds a memory READY strobe
• Flags are added to the call stack
• Call stack size is controllable
• The external address bus can be configured to range from 8 to 24 bits in size.
• The isp8asm and isp8sim tools have been updated

These new changes were made with the intention of minimizing the impact on existing assembly code while still providing a substantial improvement in the capabilities of the microprocessor. Most LatticeMico8 designs should be able to transition to the v.3.0 core with little effort. Designs that did not implement external scratchpad will migrate easily. The assembly source only needs to be recompiled using the new assembler, and the HDL code updated for the new features. The release package includes examples of how to change the HDL for v.3.0.

For a more detailed discussion of these changes, click here.

Version 3.0 of the LatticeMico8 is a very capable, small, fast soft microprocessor. Lattice looks forward to providing additional features in the future.