March 2008
Lattice Captures DesignVision Award for LatticeXP2 FPGA Family, Design ToolsIEC recognizes Lattice’s advanced technology achievements in FPGA hardware and software.
On February 5th, Lattice was recognized by the International Engineering Consortium (IEC) with a DesignVision award for its LatticeXP2 FPGA family and ispLEVER design tools. Just eight products, from among hundreds of nominations, received the accolade in a ceremony held during DesignCon 2008 in Santa Clara, CA.
“This year’s winners exemplify the highest level of innovation in today’s industry,” said IEC (International Engineering Consortium) Executive Vice President Roger Plummer. “We are pleased to congratulate Lattice Semiconductor for its LatticeXP2 FPGA family, which received the 2008 DesignVision Award this week at DesignCon 2008.” The IEC sponsors DesignCon.
The DesignVision Award is the second major industry recognition of the LatticeXP2 FPGA family; in December 2007, EDN magazine named the device family as one of the year’s “Hot 100” products. When the FPGA family was first announced in May 2007, the widely respected FPGA and Structured ASIC Journal noted “the benefits of non-volatility put the LatticeXP2 in a league by itself.”
“We are doubly honored that both our LatticeXP2 FPGA family and our software design tools have been recognized with the DesignVision Award,” said Stan Kopec, Lattice corporate vice president of marketing. “It has been both exciting and gratifying to witness, in just eight months, the enthusiastic market response to, and industry recognition of, these unique 90nm non-volatile FPGAs.”
The LatticeXP2 family combines a Look-up Table (LUT)-based FPGA fabric with Flash non-volatile cells on a 90nm process technology, in an architecture called flexiFLASH. The flexiFLASH approach provides benefits such as:
LatticeXP2 devices also support live updates with Lattice’s unique TransFR technology, 128-bit AES design encryption and dual-boot technologies. The family provides five devices ranging between 5K and 40K LUTs in a wide variety of packages.
The ispLEVER design tool suite is the flagship design environment for the latest Lattice FPGA products. It provides a complete set of powerful tools for all design tasks, including project management, IP integration, design planning, place and route, in-system logic analysis and more. The ispLEVER tool suite is provided on CD-ROM and DVD for Windows, UNIX or Linux platforms. The ispLEVER Windows version includes industry leading 3rd party tools from Lattice partners Synplicity and Mentor Graphics for synthesis and simulation.
© Lattice Semiconductor Corporation 2012
