Archive

2008

• ispLEVER 7.1 SSO Analyzer - An Industry First!
  Simultaneous Switching Output (SSO) analysis during the course of I/O planning can help mitigate noise conditions early in the design flow, thus saving time and preventing reliability issues later on. The Lattice SSO Analyzer is a unique tool to assist designers in performing this vital analysis. And currently, such a tool for FPGA design is only available from Lattice. Full story...
• Low-Cost MachXO Starter Evaluation Board Offers Convenient Design Platform
  This ready-made platform for the MachXO256 includes an AC adapter and download cable, all for $99! Full story...
• ispMACH 4000ZE Perfect for Low-Power, Space-Constrained Hand-Held Applications
• IP Suites Offer a Total IP Solution for Less
• Reliability Monitor Report

• Video: New Low-cost PCI Express Development Kit
  Watch this 5-minute video and learn how easy it is to implement PCI Express designs using LatticeECP2M FPGAs. See how to get to working hardware in less than 30 minutes. Full story...
  
• PCI Express Development Kit: Implement PCI Express Links in Under 30 Minutes!
  New low-cost LatticeECP2M Development Kit enables rapid PCI Express system design - 30 minutes to demo, 2 hours to design validation. Full story...
  
• Accelerate Display Interface Design with 7:1 LVDS Reference Design
• Flexible Image Processing Platform for LatticeECP2 FPGAs
• Wireless Solutions Brochure Available
• More...

• ispLEVER 7.1 Service Pack 1 Available Now
  This important upgrade for ispLEVER 7.1 software includes new 3rd party synthesis and simulation tools, integration of the ORCAstra configuration utility, expands Reveal Logic Analyzer support to the Linux platform, adds support for new automotive temperature grade LatticeXP2 non-volatile FPGAs, and much more.  Full story...
  
• Scatter-Gather DMA Demo for Scaling and Measuring PCI Express Performance
  New demo enables measurement of high-throughput PCI Express applications with non-contiguous memory systems.  Full story...
  
• Improved SPI4.2 Interface Offers Numerous Benefits
• PAC-Designer Design Tool Now Supports Automotive Versions of Power Manager II Devices
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• Four Popular ispLeverCORE IPs are LatticeMico32 Compatible
  The LatticeMico32 is an open source 32-bit RISC processor that is generated by the Mico System Builder (MSB) environment, which may be freely downloaded from the Lattice website. Lattice has been increasing the number of paid-for IP cores that seamlessly integrate with the LatticeMico32 in the MSB.  Full story...
  
• ispMACH 4000ZE Ideal for Small, Low-Power, Low-Cost Portable Products
  New CPLD family features industry's lowest static power, and standby current as low as 10uA, in ultra-small, space-saving packages. Full story...
  
• ispLEVER Classic 1.2 Available Soon
• Verilog Training Classes
• More...

• LatticeXP2 Moves to the Driver's Seat
  On June 30th, Lattice announced that automotive versions of its non-volatile, 90nm Flash-based LatticeXP2 FPGAs have been characterized and qualified to meet the certification requirements of the AEC-Q100 standard as defined by the Automotive Electronics Council.  Full story...
  
• New Mixed-Language Flow and Platform Support for ispLeverCORE IP Cores
  Design flow improvements ease adoption of IP core solutions. Full story...
  
• Active-HDL Simulator Training Available
  
• Lattice and the Road to 100G Alliance at NXTcomm08
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• New Board for Ultra Low Power ispMACH 4000ZE CPLD
  The ispMACH 4000ZE Evaluation Board is a compact, efficient and low-cost platform designed to help you evaluate the ispMACH 4000ZE technology, learn the device features and operation, and prototype your own design. Full story...
  
• Modular ATCA FRU Payload Power Management Architecture
  The ispPAC-POWR1220AT8 Power Manager device is the key to a new approach in ATCA power management, providing increased flexibility and fault coverage. With the POWR1220, you not only get a more flexible and robust solution, you can also reduce your time-to-market and reduce cost. Full story...
  
• Lattice Goes Wireless
  
• Synthesis Handshaking Improved in ispLEVER 7.1
• Multifunction Secure Digital Design Made Simple
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• New ispMACH 4000ZE Family Uses Ultra-Small, Space-Saving Packages
  On April 28th, Lattice announced its new, ultra low power CPLD, the 1.8V ispMACH 4000ZE family. This second-generation in-system programmable CPLD family is ideal for low-power, high-volume portable applications, with typical standby current as low as 10µA. Full story...
  
• ispLEVER 7.1 Design Software Now Available
  ispLEVER Design Tool Suite includes an industry-first SSO Analyzer for SERDES design and new, upgraded synthesis and simulation tools, making ispLEVER better and easier to use than ever before. Full story...
  
• Digital Power Management for Analog Power Supplies
  
• Lowest-Cost JESD204 Support
• Microcontroller Obsolescence Solution
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• Entire LatticeXP2 Family Shipping in Volume
  Developed using the industry's most advanced non-volatile FPGA technology, a 90nm embedded Flash process, the LatticeXP2 devices provide the “instant-on” and reduced footprint benefits of earlier non-volatile Lattice devices, while also enhancing design security, RAM back-up and live update capabilities. Full story...
  
• LatticeMico8 Receives a Makeover. And It’s Still Open Source.
  Enhancements have been made to increase code size and ease of programming. Full story...
  
• Improved PLDA XpressLite Solution Simplifies Evaluation and Design
  
• Design Consulting Program Expands
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• LatticeXP2 Non-Volatile FPGA Devices Released to Production
  The 17K LUT LatticeXP2 –17 device, one of five members of Lattice's third-generation non-volatile LatticeXP2 FPGA family, has been fully qualified and released to volume production. Full story...

• uClinux for the LatticeMico32 Accelerates Embedded Development
  Lattice has expanded its commitment to open source embedded system design by releasing an implementation of the uClinux Operating System targeted for the LatticeMico32 embedded soft core processor.Full story...

• Lattice Automotive Offering Expands with 2008 Model Introduction
• Avoid the Pitfalls of Reset Generator and Voltage Supervisor Selection

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• Power Manager II Moves Into the Fast Lane
  Lattice has released automotive versions of its second generation Power Manager II family. The popular ispPAC-POWR1014 and ispPAC-POWR1014A have been characterized and qualified to meet the certification requirements of the AEC-Q100 standard as defined by the Automotive Electronics Council. Full story...

• LatticeXP2 Chosen as "Hot 100" Product
  The third-generation, non-volatile LatticeXP2 FPGA family was recently recognized as one of the “Best and Brightest” products of 2007 by EDN Magazine. Full story...

• Low-Cost Serial RapidIO Solution
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• ispLEVER 7.0 Service Pack 2 Now Available
  New 3rd party Synthesis versions, Power Calculator tool enhancements and concurrent LatticeMico32 System tools release support VHDL design and the Linux operating system. Full story...

• Low-Cost, FPGA-Based ADC Interface Reference Design Solution
  The recently-announced LatticeECP2/M FPGA interface reference design supports the Texas Instruments ADS6000 family of analog-to-digital converters, and delivers exceptional performance and value. Full story...

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2007

• Entire 90nm LatticeECP2M FPGA Family Released to Production
  All members of the LatticeECP2M family are now shipping in volume. Full story...
• IEEE 1588 for Industrial Ethernet in IP or ASSP
  Lattice and Oregano Systems partner to deliver a clock synchronization solution that meets the IEEE 1588 standard. Full story...
• New Throughput Demo Measures PCI Express Performance
• Synplify® DSP Now Supports LatticeECP2M and LatticeXP2 FPGAs
• More...

• Affordable FPGA-Based SMPTE SDI Solution Demonstration
  Lattice's low-cost LatticeECP2M FPGA, and Multi-Rate Serial Digital Interface (SDI) PHY Layer IP core make a compelling video solution. Lattice has developed a complete system to demonstrate compliance to SMPTE standards and highlight various aspects and modes of the solution.  Story...
• New LatticeMico32 Demo with DDR Memory and VGA Monitor
  This new demo brings together the LatticeMico32 soft processor with DDR2 memory controller IP and VGA monitor IP on the LatticeECP-based LatticeMico32/DSP Development Board.Story...
• Lattice and Dune Networks to Develop SPAUI-Based Network Solutions
• Helion Vision Selects LatticeXP2 for Next Generation Camera Modules
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• Lattice Releases Bridging Solution for Switched Ethernet Applications
  Trying to hook up your Network Processor to an Ethernet switch, but frustrated by high IP licensing fees, high power consumption and large FPGA footprints? Fear not, the X2S4 solution is here. Story...
• ispLEVER Service Pack 1 Adds Full LatticeXP2 Support and More
  A valuable update to the ispLEVER 7.0 FPGA design software is now available for all licensed ispLEVER users. Service Pack 1 includes new support for LatticeXP2-8 and LatticeXP2-30 FPGAs and numerous other productivity enhancements. Story...
• New Industry Alliances for Interoperability and Hypertransport
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• Lattice FPGAs Ideal for High-Security Applications
  In today's complex systems, FPGAs are increasingly used to replace functions traditionally performed by ASICs and even microprocessors. Ten years ago, the FPGA was at the fringe of most designs; today it is often at the heart. Consequently, FPGA design security has become an increasingly important topic of discussion for designers. Story...
• Open Source Drives Lattice Soft Microprocessors
  Lattice has introduced an open source soft microcontroller, the LatticeMico8, and an open source soft microprocessor, the LatticeMico32, targeted towards FPGAs and optimized for Lattice FPGAs. Unlike traditional open source software licenses that require derivative works to be open source, Lattice recognizes that devices that use open source microprocessors need to be proprietary. Story...
• Configure Lattice MACO with IPexpress
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• HyperTransport Supports Up to 1600Mbps in LatticeSC/M FPGAs
  The LatticeSC/M FPGA families now support HyperTransport technology at rates up to 1600Mbps, QDRII+ rates up to 750Mbps, RLDRAM II rates of 800Mbps and DDR2 interface speeds of 667Mbps. HyperTransport technology and memory interfaces are implemented using the LatticeSC/M families' innovative PURESPEED I/O technology. Story...
• Twisted Pair Cable High-Speed Serial Transmission with LatticeSC/M FPGAs
  The use of twisted pair cabling for backbone and intra-platform interfaces is becoming increasingly common. Relatively inexpensive and ubiquitous cabling and cable connectors are available that comply with the TIA/EIA-568-A Commercial Building Wiring Standard.  Story...
• Standardized Programmable Power Management
• Lattice-PLDA Partnership Builds PCI Express Connectivity
• New ispClock5312S Evaluation Board Supports Versatile ispClock Device
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• New LatticeXP2 FPGA Family Doubles Density and Cuts Cost
  On May 29th Lattice announced the availability of its third generation non-volatile FPGAs, the LatticeXP2 family. With enhanced capabilities, the LatticeXP2 family doubles maximum logic capacity to 40K Look-Up Tables (LUTs), improves performance 25% and adds dedicated DSP blocks, all while reducing the price per function by up to 50%. Story...

• ispLEVER 7.0 Design Software Now Available
  It’s official: ispLEVER 7.0 packs some serious new silicon support, greatly improved performance metrics, and some dynamite new features and enhancements. Story...
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• New 90nm LatticeECP2M FPGAs Offer Embedded SERDES
  Lattice has announced the LatticeECP2M FPGA family, the industry's first low cost FPGAs offering high-speed embedded SERDES I/O plus a pre-engineered Physical Coding Sublayer (PCS) block. Based on the innovative LatticeECP2 low cost architecture, the new LatticeECP2M family also has been developed on advanced 90nm CMOS technology utilizing 300mm wafers. Story...
• Ultra Low Cost Power Management Solution
  Recently, Lattice announced the addition of the programmable, ultra low cost ispPAC-POWR607 device to its second generation Power Manager II product family. The new devices achieve a sub-$1.00 price point in high volume, targeting many cost-sensitive power management applications in consumer markets such as LCD TV, automotive multimedia systems, GPS receivers, Multimedia Terminal Adapters and set-top boxes. Story...
• ispLEVER 6.1 Design Software Now Available
• LatticeSC/M25 Goes to Full Production
• More...

2006

• Programmable SPI4.2 Solution for LatticeECP2 FPGAs
  The Lattice SPI4.2 solution targets the LatticeECP2™ FPGA and is the only programmable solution based on a low cost FPGA fabric that can operate at the full 10Gbps line rate.   Story...
• Accelerate Your Time to Market with Low Cost Lattice Automotive Devices
  Lattice is in high-gear to achieve TS-16949 Automotive certification by Q4, 2006. In addition, Lattice is expanding its commitment to the automotive marketplace with the release of the AEC-Q100 qualified Lattice automotive product families, LA-MachXO and LA-ispMACH4000V.   Story...
• Lattice Expands ispClock5300S Family
• ispLEVER 6.0/SP1 Adds 90nm FPGA Support and More
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