June 2011The rapid proliferation of smartphones and tablets has led cellular carriers to install ever faster base stations and backhaul links in quick succession. At a cellular site, a carrier may need to aggregate voice and data traffic from a variety of base stations (legacy 2G GSM, 3G W-CDMA, 4G LTE, and 4G WiMAX) and then route it securely and efficiently to various backhaul links (DSL, PON, Fiber, Microwave) to minimize transmission costs. Cellular carriers accomplish this by using a Cell Site Router located near base stations.
Cellular Traffic Aggregation and Backhaul Network
A leading manufacturer of Cell Site Routers uses a Packet Processor ASSP to aggregate traffic from various base stations, streamline it into flows, and ensure Quality-of-Service before transmission to backhaul links. However, the Packet Processor ASSP lacks certain critical functionalities required by fast-evolving Cell Site Routers. For instance, this off-the-shelf ASSP lacks content encryption and precision timing capabilities. Content encryption is required to securely transmit data and precision timing is required for seamless transfer of calls from one cell to the next without dropping them.
This Cell Site Router manufacturer uses a LatticeECP3 FPGA as a coprocessor to provide content encryption and precision timing. The manufacturer selected the LatticeECP3 for its high quality, jitter tolerant SERDES, which is required in the rugged outdoor environment of many base station sites. In addition, Lattice and its IP partners provide ASIC-quality IP solutions for content encryption (IPSec, which stands for IP Security), precision packet timing (Precision Timing Protocol, also known as PTPv2.0 and IEEE 1588), and XAUI and HiGiG MAC IP cores for seamless interface with the Packet Processor ASSP.
The LatticeECP3 FPGA-based communication coprocessor solution eliminated the need to develop a custom ASIC and allowed the manufacturer to reach market quickly. Moreover, the flexibility of the LatticeECP3 FPGAs and ready-made availability of a broad range of ASIC-quality IP solutions empowers the manufacturer to build a future-proof Cell Site Router platform. In the near future, they can significantly increase the capacity of backhaul links by implementing content compression in the FPGA coprocessor. Similarly, they can build a differentiated product by building connectivity to cost-efficient microwave backhaul links by leveraging Lattice’s growing portfolio of wireless IP solutions, including MIMO, Crest Factor Reduction (CFR), Digital Pre-distortion (DPD), and more.
In summary, easy-to-program LatticeECP3 FPGAs can be readily used as coprocessors to provide critical functionalities to ASSPs from Broadcom, Marvel, AMCC, PMC Sierra and STMicro. The Packet Security (IPSec) and Packet Timing (IEEE 1588) solutions are also useful in various industrial networking and automation applications.
© Lattice Semiconductor Corporation 2012
