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LatticeNEWS June 2010

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XP2 Brevia Kit Thumbnail

Low-Cost LatticeXP2 Brevia Development Kit Accelerates Application Development

The LatticeXP2 Brevia Development Kit, along with 28 silicon-proven reference designs, empowers designers to quickly learn about the versatility of LatticeXP2 FPGAs and rapidly develop solutions for a wide variety of applications. The Kit is available for a special price of $29 until August 31, 2010. Full story...

LatticeCORE Thumbnail

DVB-ASI IP Core Released

DVB via Asynchronous Serial Interface (or DVB-ASI) is designed to transport MPEG-2 video streams over cable media, primarily for television applications, at up to 270 Mbps. Full story...

LatticeECP3 JESD204A Interoperability Testing with High-Speed Converters from NXP Semiconductors

NXP recently announced the availability of two low-cost, low-power demonstration boards for its CGV high-speed data converter (ADC/DAC) family, based on the LatticeECP3 FPGA family. Full story...

Simplify Boundary Scan Testing with MachXO PLDs

By using the Multiple Boundary Scan Port Addressable Buffer (BSCAN1) and Multiple Boundary Scan Port Linker (BSCAN2) reference designs, users can rapidly prototype BSCAN control applications with the MachXO Control Development Kit. Full story...

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