July 2009

New Package Option for MachXO PLD Family Reduces Cost and Board Area

Driven by the increasing need to minimize board space in telecom infrastructure, server, industrial and consumer applications, Lattice has introduced a new 0.8-mm pitch 256-ball Chip-Array BGA (caBGA) package for the popular MachXO PLD family. This provides designers with a broader range of package options for implementing cost-sensitive, board space constrained designs. The MachXO640, 1200 and 2280 devices are now available in the 14x14 mm, 256 caBGA package with up to 211 user I/Os. The new packages provide designers with 10% lower cost and 30% reduction in board area than previously available on 1.0-mm pitch 256-pin Fine-Pitch Thin BGA (ftBGA) packages.

Packaging shown actual size.

Ideal for general purpose I/O expansion, control, bus bridging and power-up management functions in a wide range of low-density applications, the instant-on, easy-to-use MachXO PLD family offers users the benefits of increased system integration by providing embedded memory, built-in PLLs, high-performance, flexible multi-voltage I/O, small footprint, remote field upgrade (TransFR) technology and low power sleep mode, all in a single device.

Production devices of the MachXO640, 1200 and 2280 in the 256 caBGA package are available now. Volume pricing for the MachXO640 caBGA256 is $2.75 in 250,000 unit volumes.

The new MachXO640, 1200 and 2280 caBGA256 device packages are supported in Lattice ispLEVER 7.2 SP2 software. The free ispLEVER Starter software can be downloaded from the Lattice website.

To Learn More

For further information about the MachXO PLD family, visit the Lattice website or contact your local Lattice sales representative.