July 2008

LatticeXP2 Moves to the Driver's Seat

Lattice announces automotive versions of its Flash-based, non-volatile LatticeXP2 FPGA family.

On June 30th, Lattice announced that automotive versions of its non-volatile, 90nm Flash-based LatticeXP2 FPGAs have been characterized and qualified to meet the certification requirements of the AEC-Q100 standard as defined by the Automotive Electronics Council (AEC). Designated the LA (“Lattice Automotive”)-LatticeXP2 family, these devices join Lattice's previously announced automotive families:

• LA-MachXO Crossover Programmable Logic Devices
• LA-ispPAC-POWR1014/A Programmable Power Manager Devices
• LA-ispMACH 4000V and LA-ispMACH 4000Z CPLDs

Production quantities of the new LA-LatticeXP2 devices will be available in 4Q2008, and Lattice can provide standard PPAP (Production Part Approval Process) documentation now to automotive customers who require it.

About Lattice Automotive LA-LatticeXP2 Devices

The LA-LatticeXP2 automotive FPGA family consists of three members, with capacities from 5K to 17K 4-input Look Up Tables (LUTs). Embedded Block RAM is provided with up to 276Kbits on-chip in 18Kbit dual-port blocks. For small scratch pad memories, LUTs also can be converted into small, distributed memory blocks. To support increasingly common DSP applications, up to 5 sysDSP blocks provide hardwired high-performance pipelined multiply and accumulate functions. The devices have up to four Phase Locked Loops (PLLs) that allow designers to align and synthesize clocks as required in their designs.

sysDSP Block Diagram

flexiFLASH Architecture Enables a Single Chip Solution

Flash memory blocks are embedded within LA-LatticeXP2 FPGAs to store the device configuration, providing a true single chip solution that Lattice calls the flexiFLASH architecture. At power-up or on user command, the data stored in the Flash memory is transferred into SRAM cells that control the configuration of the device. This transfer is done in a massively parallel fashion, enabling the device logic to be available in approximately 1mS, well ahead of the other devices in the system and much faster than SRAM-based FPGAs that use external boot PROMs, regardless of whether they are provisioned separately on-board or stacked in the same package. This instant-on capability is critical for many system functions such as power-up sequencing, address decoding and reset logic.

flexiFLASH Architecture

Availability

Samples of the LA-LatticeXP2 family 5K and 8K LUT devices in the 144 TQFP and 256 ftBGA packages, and the 17K LUT device in the 256 ftBGA package, are available now, with 208 PQFP package options available in the third quarter of 2008.