February 2010

Free MachXO and ProcessorPM Technical Seminar

• Date & Time: March 3, 2010, 8:30-11:30 a.m.
• Location: Avnet, 1820 McCarthy Blvd. Milpitas, CA
• Presenters: Lattice engineering staff and technical resources
• Cost: FREE!

Seminar Agenda

• 8:30-9:00 a.m. - Breakfast & Registration
• 9:00-11:30 a.m. - Product Overview & Demos
• Additional demo time following seminar (optional)

Give-Aways

• Acer Netbooks compliments of Lattice
• Door prizes and other give-aways
• Discount coupons for purchase of demo boards will be included at the seminar

Register Today!

MachXO PLDs

The MachXO family of non-volatile infinitely reconfigurable Programmable Logic Devices (PLDs) is designed for applications traditionally implemented using CPLDs or low-density FPGAs. Widely adopted in a broad range of applications that require general purpose I/O expansion, interface bridging and power-up management functions, MachXO PLDs offer the benefits of increased system integration by providing embedded memory, built-in PLLs, high performance LVDS I/O, remote field upgrade (TransFR technology) and a low power sleep mode, all in a single-device. Designed for a broad range of low density applications including system control designs, the MachXO PLD family is used in a variety of end markets including consumer, automotive, communications, computing, industrial and medical.

Key features and benefits:

• Instant-on, non-volatile - Powers up in less than 1ms, enabling precise control during system boot-up.
• Single chip - No external configuration memory required reducing total system cost.
• Embedded and distributed memory - Efficient, cost-effective data buffering
• Built-in PLLs and oscillator - Integrated clock management reducing total system cost
• Flexible, high-performance I/Os - Interfaces with multiple voltages and speed-critical functions
• Sleep mode - Reduces standby power to <100 uA
• TransFR technology - Allows remote field upgrades while the equipment operates

ProcessorPM Power Management Solutions

Power Management solutions from Lattice deliver highly accurate, flexible, and low cost solutions for power supply and processor/DSP management. By integrating a versatile PLD core with Analog-to-Digital (ADC) converter, Digital-to-Analog Converters (DAC), differential sense analog monitors, I²C communication, and in-system programmability (ISP), Lattice power management devices increase board reliability, decrease component count, and help cut costs. Three power management families: ProcessorPM, Power Manager II, and Power Manager address a variety of applications – all in a single low-cost chip.