February 2008

Quest Innovations Selects LatticeECP2/M for Next Generation Camera System

System integrates LatticeMico32 microprocessor and DDR2 memory IP.

Quest Innovations has selected the LatticeECP2 and LatticeECP2M FPGAs (collectively, the LatticeECP2/M family) for use in its next generation Raptor series of scalable, intelligent Gigabit Ethernet cameras. Quest has integrated its QuadCore IP into the Lattice FPGA. The QuadCore IP is a multi-core, scalable parallel pixel processing unit. By connecting 10 QuadCore IP cores together, Quest is able to deliver more than 1 Gbyte/second image processing and transfer. This latest version of the Raptor camera system will support more than 2Mpixels, 500 fps, and 8Gbytes of memory and is capable of pre-processing and storing up to 24 seconds of high-speed image data.

The decision to use the LatticeECP2/M family of low-cost FPGAs was driven by the availability of the LatticeMico32 open source soft microprocessor core, 840Mbps high speed LVDS I/Os, pre-engineered DDR2 memory interface IP and the embedded, full-featured DSP blocks available with this FPGA architecture.

About the LatticeECP2/M FPGA Family

The LatticeECP2/M family has redefined the low-cost FPGA product category by providing performance-enhancing features that are typically available only on more expensive competitive high-end FPGAs. The LatticeECP2/M family offers:

• Logic densities from 6K LUTs up to 95K LUTs
• High performance DSP blocks
• DDR2 memory interfaces at up to 533Mbps and up to 840Mbps generic LVDS performance

Some of the high-end features incorporated into the LatticeECP2M family include embedded SERDES I/O and the most on-chip memory in its class. The LatticeECP2M family supports up to 16 channels of embedded SERDES operating up to 3.125Gbps, and protocols such as PCI Express, Ethernet (1GbE and SGMII), CPRI and OBSAI. The LatticeECP2M Embedded Block RAM capacity ranges from 1.2 Mbits to 5.3 Mbits, representing up to a 400% increase over competitive low-cost architectures. All LatticeECP2/M family members in all package options are now in full production.

Lattice ECP2M Block Diagram

Note: Features not shown on this diagram include eight global clock nets, eight regional clocks and two edge clocks per side.

To Learn More

For further information about the LatticeECP2/M FPGA family, visit the Lattice website or contact your local Lattice sales representative.

For more information about the Raptor Camera System, visit the Quest Innovations website.