December 2007

Entire 90nm LatticeECP2M FPGA Family Released to Production

All members of the LatticeECP2M family are now shipping in volume.

Lattice has completed the production release of its LatticeECP2M FPGA devices, ranging in density from 20K LUTS to 95K LUTS.

Announced in late 2006 and developed on advanced 90nm CMOS technology utilizing 300mm wafers, the LatticeECP2M devices are the industry’s first low-cost FPGAs to offer high-speed embedded SERDES I/O, plus a pre-engineered Physical Coding Sublayer (PCS) block. Previously, high-speed embedded SERDES serial I/O with speeds over 3Gbps had been available only on relatively expensive high-end FPGAs. Integrating this capability into a low-cost FPGA fabric has made this higher performance interface technology accessible to a much broader range of applications in rapidly emerging, cost-conscious markets such as high-volume communications, consumer, automotive, video and industrial equipment.

LatticeECP2M Block Diagram

The LatticeECP2M FPGA family has effectively bridged the price/performance gap between low-cost and high-end FPGAs, and was named 2006 Product of the Year by Electronic Products magazine. 

To Learn More

For further information about the LatticeECP2M family and other FPGA devices, visit the Lattice website or contact your local Lattice sales representative.