August 2010

LatticeECP3-17 Enables Security/Surveillance, Video and Communications Bridging Applications

The LatticeECP3-17 device in the award winning, high value, low power LatticeECP3 mid-range FPGA family, has been fully qualified and released to volume production.  It is the only mid-range FPGA in its density range to offer four SERDES channels with data rates of up to 3.125 Gbps.  The LatticeECP3-17 is ideal for high-volume, low-power and low-cost designs in video, security/surveillance, industrial, embedded and communications applications such as:

• Security/Surveillance
  - Low cost Image Signal Processing (ISP)
  - Simple video analytics applications
• Video/Displays
  - LED backlight control
  - Timing controllers
  - 7:1 LVDS video interface
  - Sub-LVDS interface
  - SD-SDI, HD-SDI, 3G-SDI
• Wireless
  - Bridge to high-speed ADC/DAC using JESD204A
• Wireline
  - PCI Express to SGMII bridge
  - PCI Express RC-lite for bridging applications

Features

• 17 K LUT4s of logic capacity to implement complex designs
• Up to 4 SERDES channels with data rates from 150 Mbps to 3.125 Gbps supporting a wide range of serial protocols: PCI Express, Ethernet (1GbE, SGMII, XAUI), CPRI, Serial RapidIO 2.1, SONET/SDH, SPI4.2 and 3G SMPTE
• Proven low-cost wirebond packaging
• 700Kbits of embedded memory and 36 Kbits of distributed RAM
• Fully-cascadable DSP architecture with 24 18x18 multipliers and powerful 54-bit ALU operation
• Two DLLs and two PLLs
• Up to 222 I/O with programmable sysIO buffer support for a wide range of interfaces including 800 Mbps DDR3
• 1 Gbps LVDS I/O, with input delay blocks, allows interfacing to high-performance ADCs and DACs
• 27% to 31% lower Total Power consumption when compared with competing SERDES capable FPGAs in its density range

Intellectual Property

A range of intellectual property (IP) cores, including FIR filters, FFT, Reed-Solomon Encoders, Reed-Solomon Decoders, CORDIC, CIC, NCO for DSP functions, CPRI, OBSAI, Serial RapidIO, XAUI, SGMII/Gigabit Ethernet, PCI Express, Tri-Rate SDI PHY, JESD204A for serial connectivity, and DDR, DDR2, and DDR3 for memory interfaces, are available from Lattice and its partners to enable users to develop rapid time-to-market design solutions.

Software

The LatticeECP3 FPGA family is supported by the Lattice Diamond 1.0 and ispLEVER 8.1 design software which provide a complete set of powerful tools for all design tasks, including project management, IP integration, design planning, power analysis, place and route, on-chip logic analysis and more.

To Learn More

To learn more about the LatticeECP3 FPGA family, visit the Lattice web site or contact your local Lattice sales representative.