August 2009

Speed Development Time with New Reference Designs

Lattice reference designs are powerful, free-of-charge design examples, which have been optimized for Lattice programmable products. These designs provide you with a great starting point and ultimately help improve time to market. Lattice reference designs tend to focus on routine functions and are typically available for download as HDL (Verilog and/or VHDL) source code or PAC-Designer project source. Each design includes a document with a functional description and implementation results for one or more target devices.

Six new reference designs have been released for the MachXO PLD family:

• Control Link Serial Interface
• Digital PWM Fan Controller
• I2C (Inter-Integrated) Slave/Peripheral
• LCD Controller (WISHBONE Compatible)
• NAND Flash Memory Controller
• SD Flash Memory Controller

Two new reference designs have been released for Power Management:

• Supervisor, Watchdog Timer, and Reset Generator ProcessorPM Factory Preset
• 5V and 3.3V Hot Swap Controller

To Learn More

For further information about these and other reference designs, visit the Lattice website.