August 2009A list of recently published documents, including descriptions and ordering numbers.
On-line versions of these publications are available on the Lattice website at www.latticesemi.com. Some documents are also available in print. To order print versions, call your local Lattice representative or Lattice's Literature Distribution Department at 1-888-477-7537 (outside the U.S. and Canada, call 503-268-8000) or order by FAX at 503-268-8556. In Europe, contact Lattice's European Literature Fulfillment Department by phone at +44 (0)117 934 1600, by FAX at +44 (0)117 934 1601 or by e-mail at euro.lit@latticesemi.com.
| Title | Description | Web | Order # | |
|---|---|---|---|---|
| General Information | ||||
| ProcessorPM Development Kit Product Brief | Introduction to the ProcessorPM Development Kit, a versatile, ready-to-use hardware platform for evaluating and designing with ProcessorPM power management devices. | ![]() |
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I0202 |
| ProcessorPM Development Kit User's Guide | Guidelines for use of the ProcessorPM Development Kit. | ![]() |
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| ProcessorPM Development Kit Quick Start Guide | A brief introduction and instructions to install and run the ProcessorPM Development Kit on Windows 2000/XP/Vista versions. | ![]() |
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| MachXO Control Development Kit User's Guide | Guidelines for use of the MachXO Control Development Kit, a platform for prototyping functions such as temperature and current monitoring, power supply sequencing, reset distribution and fan control. | ![]() |
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| Reference Designs | ||||
| Control Link Serial Interface | This reference design provides an example of how to implement a low-speed serial control link using Differential Manchester code. | ![]() |
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| Digital PWM Fan Controller | Examples of 2-, 3- and 4-pin fan control with an FPGA. The advantage of using a low-cost FPGA together with a fan device is that it has sufficient logic resources to create a complete thermal management system. Such a system can carry out functions like monitoring temperature sensors and displaying information on an LCD, in addition to fan speed control. | ![]() |
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| I2C Slave/Peripheral | This design implements an I2C slave module in a FPGA or CPLD. It follows the I2C specification to provide device addressing, read/write operation and an acknowledgement mechanism and adds an instant I2C compatible interface to any component in the system. | ![]() |
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| WISHBONE-Compatible LCD Controller | This reference design provides a processor interface to the common dot-matrix LCD module. | ![]() |
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| NAND Flash Memory Controller | This design provides a controller that targets the NAND Flash memory for non-volatile data storage applications. | ![]() |
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| SD Flash Memory Controller | The Secure Digital (SD) Card is a Flash-based memory card that is widely used in today’s consumer electronic devices. Its high-capacity, compact package and security make it a suitable candidate for both video and audio applications in electronic products. | ![]() |
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| Supervisor, Watchdog Timer and Reset Generator ProcessorPM Factory Reset | The ProcessorPM device is shipped from the factory preprogrammed with a design that provides three functions: voltage supervision, watchdog timer, and reset generator. This document describes in detail the design that is preprogrammed at the factory. | ![]() |
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| 5V and 3.3V Hot Swap Controller | This reference design implements a hot swap controller design within a Power Manager II mixed-signal PLD. The design manages 5V and 3.3V supply rails to limit inrush current to a user-defined level. | ![]() |
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| IP Core User's Guides | ||||
| XAUI IP Core User's Guide | Detailed user's guide for the XAUI IP core. | ![]() |
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| Scatter-Gather Direct Memory Access Controller IP Core User's Guide | Detailed user's guide for the Scatter-Gather Direct Memory Access Controller IP core. | ![]() |
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| PCI Express 1.1 x1, x4 IP Core User's Guide | Detailed user's guide for the PCI Express 1.1 x1, x4 IP Core. | ![]() |
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| PCI Core IP User's Guide | Detailed user's guide for the PCI IP Core. | ![]() |
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