 Four Popular ispLeverCORE IPs are LatticeMico32 Compatible
MSB-ready IP cores accelerate your design productivity with seamless integration.
The LatticeMico32 is an open source 32-bit RISC processor that is generated by the Mico System Builder (MSB) environment, which may be freely downloaded from the Lattice website. Many simple peripherals, such as the UART and the GPIO, are also supplied with the MSB environment. Lattice has been increasing the number of paid-for ispLeverCORE IP cores that seamlessly integrate with the LatticeMico32 in the MSB. Lattice currently offers the following MSB-Ready IP cores:
These IP are downloaded and installed like all ispLeverCORE IP and they are licensed individually as are all the ispLeverCORE IP cores. They can be installed by invoking IPexpress from within ispLEVER Project Navigator or by using IPexpress stand-alone. The advantage of using Project Navigator is the configured IP will automatically be associated with a particular project. The advantage of using IPexpress stand-alone is if you want to use the configured IP in more than one project you copy the configured IP into multiple projects.
In addition, when any of the MSB-Ready IP cores are installed, they are also installed into MSB with the addition of addition of a Wishbone bus wrapper. Default parameters are also attached to the IP installed into MSB so that it is configured for use with the LatticeMico32. The IP flows are illustrated as follows.
Flow for MSB-Ready IP
While simple peripherals (UART, GPIO, etc.) are supplied with the MSB tool environment as fully functioning modules, the development system is delivered with placeholders for the four MSB-Ready ispLeverCORE IPs. To use any of the four IPs in MSB, install them locally to your computer as illustrated above. This installation method keeps the IP core revisions decoupled from the tool revisions.
IP parameters applied to the installed ispLeverCORE IP may be specific to use with the LatticeMico32, or they may be defaults used with one of the Lattice evaluation boards. For example, the DDR IP core is supplied with memory timing parameters for use with the Corsair memory module often supplied with the LatticeMico32/DSP Development Board for LatticeECP2. For use of the DDR controller IP in other systems, invoke IPexpress from within MSB and apply the timing parameters specific to your design.
In addition to the IP parameters, there may also be processor and software specific information required to integrate with the LatticeMico32. This may include address information needed for the processor to communicate with the IP core, as discussed below.
How to Make Your Own MSB-Ready IP
Other IP can be made to function in the MSB environment similar to the MSB-Ready IP supplied by Lattice. It can be your own IP, or it can be other Lattice IP. To do this you need two things:
1. A Wishbone wrapper around the IP (use MSB-Ready IPs as template)
2. A MSB data structure (use MSB Custom Components tool)
Since the Lattice supplied MSB-Ready IP is delivered with source code for a Wishbone wrapper, the four IP wrappers can be used as reference designs for you to attach your own Wishbone wrappers. For any of the MSB-Ready IP simply look for the lm32 subdirectory where the ispLeverCORE IP is installed. There you will find Verilog code for the Wishbone wrapper and code for instancing it along with the IP core. For more information on the Wishbone bus of the LatticeMico32 System see the LatticeMico32 Processor Reference Manual.
To make the IP usable by the MSB environment requires the generation of underlying data structure and processor related configuration used by software drivers. To solve this Lattice provides the Custom Components tool. It graphically guides the user through the process as it creates the data structures needed for connecting the IP in MSB, including the software drivers. See the Creating Components in Creating Components in LatticeMico32 System document for more details on this process.
To Learn More
To learn more about LatticeMico32 and ispLeverCORE IP cores, visit the Lattice website or contact your local Lattice sales office.
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August 2008
© Lattice Semiconductor Corporation 2012