August 2007One-hour webcasts available on the Lattice website.
Recent Lattice webcasts are available on demand from the Lattice website and are shown in the table below. These one-hour webcasts are presented by Lattice technical staff and may include software demonstrations and question and answer sessions. To view any of the webcasts, go to the webcasts section of the Lattice website and select your topics of interest.
| Seminar Title | Featured Product | Recording Date | Abstract |
|---|---|---|---|
| Implementing Video & Graphics Intellectual Property in FPGAs |
EasyLCD IP Core and |
08/08/07 |
IP solutions for graphics and video display controllers used in embedded applications. Topics discussed include embedded system designer architecture considerations, how FPGAs can be used to integrate multiple graphic system functions and a review the implementation of the EasyLCD graphics and video processing IP and system. |
| SERDES Fundamentals | LatticeSC/M and LatticeECP2/M FPGA Families |
07/31/07 |
View this webcast and learn the fundamentals of a SERDES-based interface, including the basics of Source Synchronous and CDR (Clock Data Recovery), when and how to use Source Synchronous vs. CDR, what makes Source Synchronous and CDR work and pointers on how to bring up the CDR hardware interface. |
| LatticeXP2 FPGAs: Full-Featured Non-Volatile FPGA Design Solutions | LatticeXP2 FPGA Family |
6/27/07 |
This webcast explores the security and instant-on advantages that only a true non-volatile solution can bring to highly integrated system design. The webcast also examines how the LatticeXP2 FPGA combines these benefits with high-end FPGA features such as full-featured DSP blocks and high-speed LVDS/DDR2 interfaces. |
| World's First 90nm Flash-based FPGAs Deliver Programmable Systems on a Chip | LatticeXP2 FPGA Family |
06/20/07 |
Through the use of an application example, this webcast explores how the latest 90nm Flash-based LatticeXP2 FPGA allows you to develop highly integrated programmable systems that are secure and have a small footprint. Topics explored include the use of FlashBAK memory, capabilities for field reprogrammability and the implementation of high-speed source-synchronous interfaces to DDR2 memory and other devices. |
| PCI Express Card Power Management | Power Manager II Mixed-Signal Device Family | 06/06/07 | This seminar explores the application of the ispPAC-POWR device's programmable feature sets to solve several problems associated with PCI Express board level power: hot-swap, power sequencing, and managing interface logic signals. In addition, the programmable ispPAC-POWR device can be used to limit the inrush current to a preset value, protecting circuitry on the PCI Express board. |
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