April 2011

Low-Cost Bridging Solutions for Camera Sensor Image Signal Processing Applications

Camera applications typically feature an image sensor and an image signal processor. An image sensor is a device that converts an optical image to an electric signal. It is used primarily in digital cameras and other imaging devices. An image signal processor (ISP) uses various algorithms on the raw data from an image sensor and delivers a more visually pleasing image or video. In the past, a parallel interface between the sensor and signal processor was sufficient to handle the data requirements (see figure below).

As sensor resolutions and frame rates increase, the traditional CMOS parallel interface is no longer capable of handling the increased bandwidth requirements. For this reason, sensor vendors are now adopting differential interfaces for higher resolution and faster frame rate sensors. As a result, various serial interfaces have made their way to sensors. However, ISPs with fast parallel interfaces are still capable of handling the higher bandwidth of the new sensors. The challenge is how to utilize the existing ISP with a parallel interface when the sensor has a serial interface.

With a low-cost Lattice FPGA such as the LatticeXP2 in a 8mmx8mm csBGA package camera vendors can perform bridging of sensors as shown in the figure below without incurring significant redesign.

Evolving Sensor - ISP Interface

This sensor bridge is ideal for security cameras, automotive applications, high-end consumer cameras and other camera applications where the use of higher resolution and higher frame rates are desirable. The LatticeXP2 FPGA is available in commercial, industrial or automotive temperature ranges. The LatticeXP2 implements the sensor bridge as a single device and is offered in various BGA and TQFP packages.

Reference Designs

The following reference designs are available for designers to download and develop time-to-market solutions:

• Aptina Sensor With HiSPi To Parallel Sensor Bridge: To support higher bandwidth sensors, Aptina Imaging has introduced a high-speed serial interface called HiSPi. The HiSPi interface can operate from one to four lanes of serial data, plus one clock lane. To interface to an ISP with a traditional parallel bus, Lattice has created a bridge from HiSPi to a parallel format.
• Panasonic Area Sensor-to-Parallel Bridge: Panasonic’s new 1080P sensor, the MN34041 (Maicovicon) has a sizeable resolution and frame rate requiring a differential high-speed serial interface instead of using a traditional CMOS parallel interface. To interface this sensor to a parallel bus ISP, Lattice has implemented a reference design to convert the MN34041 sub-LVDS serial data to a parallel format.
• Sony IMX036 Sensor With subLVDS To Parallel Sensor Bridge: Sony introduced the IMX036 sensor to support resolutions up to 1080P and utilizes a parallel DDR sub-LVDS interface. To interface the IMX036 to a parallel bus ISP, Lattice has created a reference design to convert the sub-LVDS DDR parallel format to a CMOS parallel format.