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LatticeNEWS April 2010

New White Paper: "Pre-tested System-On-Chip Design Accelerates PLD Development"

Several new white papers are now available on the Lattice web site and among them is "Pre-tested System-on-Chip Design Accelerates PLD Development".

Many moderate size Programmable Logic Device (PLD) designs, especially those in control plane applications, consist of a number of interfaces interconnected via an on-chip bus to a microprocessor that may be on- or off-chip. Although each interface is often relatively simple, the task of building all the on-chip interconnections and debugging them can be time consuming and frustrating. As a result, an increasing number of designers are using development boards with pre-designed processor-based systems to accelerate the development process. Using the MachXO Mini Development board as an example, this white paper examines development boards, and how they can accelerate development time for designs of the type typically found in small, non-volatile FPGAs.

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