LatticeMico8 Receives a Makeover. And It’s Still Open Source.
Enhancements have been made to increase code size and ease of programming.
The LatticeMico8 v3.0 is ideal for low-level control applications where a very small microprocessor footprint is required. Most configurations of the LatticeMico8 use less than 300 LUTs. Lattice has recently enhanced the soft microprocessor over the preceding version (v.2.4) in several areas in order to increase the breadth of embedded applications in which it can be employed. The changes also make programming and using the microprocessor easier and more enjoyable.

LatticeMico8 Block Diagram
Improvements
The main areas of improvement include portability, program size, memory handling, and stack operations. These changes were made to minimize the impact on existing assembly code while still providing a substantial improvement in the capabilities of the microprocessor. These enhancements are discussed below.
- Portability
The LatticeMico8 source code was originally targeted to Lattice devices of 3 years ago. And the source code was difficult to migrate to different devices. The source code for v3.0 has been updated to make migration easy. Now, no changes to the LatticeMico8 source code are necessary when porting to another Lattice device. You simply specify the Lattice device within the ispLEVER design software.
- Program Size
The ability to configure the available number of lines of code in an implementation is now possible. The available program length store can be increased in single Embedded Block Ram (EBR) increments, such as 512, 1024, or 1536 instructions or more. Additionally, the range of the branch operation has been increased four-fold to accommodate a larger code space.
- Memory Handling
The previous core had scratchpad memory, both internal to the core and external. This created a number of difficulties during implementation which required code changes if the implementation was changed, for example, from internal scratchpad only to internal and external. The decision was made to use only external scratchpad memory to create an orthogonal instruction architecture for accessing scratchpad memory.
In addition to the scratchpad memory modification, the LatticeMico8’s external memory cycle time has been updated. The LatticeMico8 external memory cycle no longer supports a 2-cycle access. The cycle time was changed because the 2-cycle implementation did not permit the use of the internal EBR memory. It was also difficult to interface to slow external peripherals that needed more time to respond to memory requests. In addition to making the external memory transactions one clock cycle longer, a transaction complete input was added. The memory access can be extended in one-cycle increments to allow slow memory components the time needed to respond.
Finally, the external address bus can be configured to range from 8 to 24 bits in length. The memory access opcodes can only access 256 ports. The extended memory range is accessed using up to 16,356 pages.
- Stack Operations
The Carry and Zero flags are pushed onto the call stack during an interrupt and during call instructions allowing switches at conditional branches to be treated more efficiently. And synthesis parameters have been added that permit the call stack to be grown to an arbitrary depth. These add improved support of high-level language compilers.
Complete List of Changes
A list of the improvements are as follows:
- Much easier to migrate between Lattice FPGA families
- Program length is no longer limited to 512 opcodes
- Unconditional Branch and Call instructions increased to the +2047/-2048 range
- Scratch pad memory is external only
- All memory access cycles are 3 clock cycles long instead of 2
- The v.3.0 core adds a memory READY strobe
- The external address bus can be configured to range from 8 to 24 bits in size.
- Flags are added to the call stack
- Call stack size is controllable
- The isp8asm and isp8sim tools have been updated
For a more detailed discussion of all changes, click here.
Most LatticeMico8 designs will transition to the v.3.0 core with little effort. Designs that did not implement external scratchpad will migrate easily. The assembly source only needs to be recompiled using the new assembler, and the HDL code updated for the new features. The release package includes examples of how to change the HDL for v.3.0.
Version 3.0 of the LatticeMico8 is a very capable, small and fast soft microprocessor. Lattice looks forward to providing additional features in the future.
Contribute to the LatticeMico8
Do you have designs you would like to share with us? Have you come across a bug? Is there a new feature you would like to see? Let us know! Send an email to Lattice Technical Support at techsupport@latticesemi.com.