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Download LatticeNEWS, July 2005: (PDF, 2.2 MB)
- New MachXO Delivers Low Cost Alternative to CPLDs and FPGAs
- TransFR Feature Enhances LatticeXP Family of Non-Volatile FPGAs
- LatticeECP and LatticeEC Families Fully Released!
- ispLEVER 5.0 Service Pack 1 Available Now!
- Lattice to Participate in Mentor Graphics EDA Tech Forums
- New ispLEVER FPGA Design Guide
- New Parameterizable IP Cores for the LatticeECP/EC Family
- New IP Cores Available on LatticeXP
- ispVM System 15.3.1 Supports MachXO Device Family
- Lattice and Mouser Electronics Sign Distribution Agreement
- Lattice Launches LEADER Program for Design Services
- Free On-Demand Web Seminars
- Lattice Listens Q&A
- Lattice Literature
Download LatticeNEWS, April 2005: (PDF, 900 KB)
- Lattice Launches Low-Cost Non-Volatile LatticeXP FPGA Family
- Lattice Announces Addition of Precision Power Manager to Programmable Mixed-Signal Product Portfolio
- Final Member of ispClock 5600 Family Released to Production
- ispLEVER 5.0 Provides Improved Performance and Features
- Precision RTL Synthesis Tools Power Your FPGA Design
- Two Evaluation Boards Support LatticeXP Family
- Worldwide Exhibitions Showcase Latest Lattice Products
- Lattice to Present at Mentor Graphics' User2User Conference
- Lattice Offers Free On-Demand Web Seminars
- Lattice Listens
- Lattice Literature
Download LatticeNEWS, November 2004: (PDF, 2.2 MB)
- New JTAG Programming Support for Low-Cost SPI Configuration Memory
- Lattice Expands Lead-Free Support
- Designing FFTs in the LatticeECP FPGA
- Dynamic Power Management Using ispClock TM and ispPAC ® Power Manager
- Lattice Showcases Automotive Temp Range Devices at 2004 Convergence Conference
- Lattice Provides Free Seminars
- Lattice and Fujitsu Expand Partnership to Include 300mm Wafers, 65nm Process Technology
- New ispLEVER ® v.4.2 Design Tools
- New Boards for LatticeEC Evaluation and Development
- Lattice and Mentor Graphics Extend Partnership
- New IP Cores Available on LatticeECP/EC Devices
- Lattice Listens
- New Lattice Literature
- Lattice Offers Free On-Demand Web Seminars
Download LatticeNEWS, July 2004: (PDF, 1.6 MB)
- Lattice Announces Details of LatticeECP™-DSP and LatticeEC™ FPGA Families
- Lattice Introduces ispClock™ High-Performance Clock Generator Devices
- LatticeECP/EC FPGAs Configure via Industry-Standard SPI Serial Flash
- sysDSP™ Block Enables High Performance DSP in Low-Cost FPGAs
- LatticeECP-DSP Design Flow
- LatticeECP-DSP FPGA Solution Lowers Digital Display Costs
- Lattice Solves High-Speed Memory Interface Challenge in Low-Cost FPGA
- Mixed-Signal ispPAC® Power Manager Devices Simplify Thales' System Design
- Lattice Lead-Free Products are RoHS Compliant
- Full Line of IP for LatticeECP/EC Devices
- New ispVM® System v.14.2 Programming Management Tools
- ispLEVER® v.4.1 Design Tool Upgrade
- New Boards Available for ORSPI4 and XPIO® Evaluation and Development
- Lattice Listens
- New Lattice Literature
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