Customer Comments

"We are using the LatticeXP devices in tri-speed Ethernet MAC (Media Access Control) IP applications. The non-volatile device architecture was very attractive to us. Our requirements for high security and instant on operation are completely satisfied by the LatticeXP device."

"Because the LatticeXP device is non-volatile, it was very easy to migrate the design because the LatticeXP FPGA requires no external boot PROM. While the design consumed virtually 100% of the CPLD, just 20% of the LatticeXP resources were needed. And the cost of the Lattice FPGA was about half that of the CPLD...Non-volatility means a single-chip solution, saving space as well as reducing our design cycle. We’ve also been very pleased with the local Lattice support; Lattice people have been a genuine partner in these designs, and their expertise has been invaluable."

"We had just about settled on another device when the LatticeEC device became available. The Lattice product provided density migration so the footprint wouldn’t change even if design changes required we switch from one part to another. Access to low cost, off the shelf SPI Flash PROMs for configuration also was very attractive. And because we have to reprogram the design on the fly, the ease of field upgrades was very important. Also, because we'd used Lattice CPLDs in the past, we were familiar with the design tool software, and we knew the local support would continue to be outstanding."

"We found the LatticeEC FPGA and the ispMACH 4000 CPLD devices were an extremely cost effective design solution for our product. Of course, we evaluated devices from several suppliers, and found the price/performance ratio and I/O combination of the Lattice devices ideal for our project. In fact, we are now looking at the new LatticeXP non-volatile FPGA for use in future designs in order to eliminate the boot PROM."

"This project presented some interesting challenges. Not only was the ASIC obsolete, it could not be manufactured in any case because most of the original design documentation was lost or unverified. It was a design challenge that required CoreSim's unique design and verification process, but also it clearly called for a low cost programmable logic device. The LatticeEC FPGA offered very attractive features that helped us make our decision. Primary among them was that the Lattice device could be configured using a low cost, standard off the shelf SPI Flash boot PROM. We also were impressed with the part's 5-volt tolerance and signal overshoot/undershoot characteristics. We also liked the density migration available within the LatticeEC family of seven devices. The local Lattice support was outstanding. The Lattice representatives were responsive, knowledgeable and available."

"We contacted several FPGA vendors. Only Lattice was able to provide accurate pricing for various volumes of devices immediately, and confirm by fax the same day. That kind of responsiveness was very important to us. The LatticeEC FPGA satisfied all of our selection criteria, and was chosen for our project. The LatticeEC device has performed flawlessly for us."

"Our customer needed a design solution that would replace the obsolete ASIC. It didn't make economic sense to design a new ASIC, so an FPGA-based adapter board was a viable alternative. After evaluating several devices from various vendors, the clear choice was the LatticeEC FPGA. Its very attractive price/performance ratio and standard SPI flash capability for configuration were key factors in making the decision. Also, 130 nm technology was an important factor, for the device drive strength and slew rates compared to 90nm technology. The fact that we could use an off-the-shelf product with excellent support was a bonus. Lattice's representatives were very responsive and added considerable value during our evaluation process."

"I was pleasantly surprised by how easily and quickly we were able to come up to speed on the LatticeEC FPGA. The design software was easy to use, and the local Lattice support was outstanding. The price/performance ratio of the Lattice device was very attractive, and the device migration path was a definite plus. We were able to move the design from one density level to another with no change in the FPGA footprint. Ultimately we decided to implement the entire design with the LatticeEC devices because the cost effectiveness of the I/O counts was so much more favorable than alternative methods. In the end, each test system uses 75 LatticeEC devices, supporting up to 2000 test channels."

"This was a very challenging project. We were working with a software-only company that needed Talijon to provide a comprehensive hardware solution. So not only were we facing formidable hardware requirements, but the schedule was extremely tight. In fact, we needed solutions for the 1U box in record time. As a result, we not only had to evaluate the devices, but also consider vendor responsiveness and product availability. Lattice made our decision pretty easy. The LatticeEC FPGA's DDR support, IP offering and large number of cells at an attractive price impressed us. And, thanks to the exceptional efforts of the local Lattice representatives, we were able to obtain the devices within a very short time."

"With the introduction of its XP non-volatile, Flash-based FPGA family, Lattice continues to expand its presence and influence in the FPGA marketplace. Combined with last year's EC/ECP introduction, and a promised announcement later this year of a high-end FPGA, Lattice is becoming a force to be reckoned with: increasingly, a legitimate competitor and alternative to the market leaders."

"The new, Flash-based XP family of FPGAs from Lattice Semiconductor, continue to lower the threshold at which designers can consider using FPGAs as their design solution. The Non-Volatility feature combined with low price points and increased device performance will open many existing applications to FPGAs along with empowering new, unanticipated applications. Lattice is to be commended for delivering the popular Non-Volatility feature in their FPGAs just as designers are awakening to the potential Flash-based parts bring to the market. Semico believes Non-Volatility coupled with the FPGA architecture will be a powerful aid to the design community in the immediate future."

"The new LatticeECP and LatticeEC devices, and associated ispLEVER tools, represent a pronounced enhancement to the previous generation of Lattice FPGAs; we are excited to implement these key IP cores for the Lattice low-cost devices."

"We are very happy with the new Lattice FPGA devices and the software tools used to implement designs to them. The new LatticeECP and LatticeEC devices are much faster than previous FPGAs. Also, the new version of the Lattice ispLEVER software is very easy to use: compilation is straightforward and provides excellent results for our reusable IP products."

"Our experience using the new ispLEVER software has been very good; without question, the tools compare favorably to other leading FPGA vendors' tools. The new LatticeECP and LatticeEC devices are much faster than previous FPGAs, and our customers will also appreciate the low-cost, feature-rich capabilities of these new products."