Lattice Semiconductor and Mentor Graphics Extend and Expand Partnership

- Partnership Adds Precision RTL Synthesis To Lattice Design Tools Portfolio, Includes Upgraded ModelSim RTL And Timing Simulator Capabilities And Performance -

HILLSBORO, OR / WILSONVILLE, OR - October 4, 2004 - Lattice Semiconductor Corporation (NASDAQ: LSCC) and Mentor Graphics Corporation (NASDAQ: MENT), today announced a multi-year extension and expansion of their OEM agreement for Mentor Graphics synthesis and simulation tools. The new agreement adds the Mentor Graphics® Precision® RTL synthesis tool to the Lattice OEM portfolio, further strengthening Lattice's tool offering. The Mentor Graphics products, Precision RTL and Leonardo®Spectrum, together with the industry standard ModelSim® Simulator, will be bundled with Lattice ispLEVER® design tools and will support all Lattice programmable logic devices, including the new LatticeECP-DSP^TM ("EConomy Plus") and LatticeEC^TM ("EConomy") FPGA device families.

"Lattice is pleased to extend our partnership with Mentor Graphics," said Stan Kopec, Lattice vice president of corporate marketing. "This new agreement strongly reinforces our mutual commitment to providing our customers with the very best design tool solutions for programmable logic by giving users greater functionality and performance in synthesis and a significantly faster simulation environment," Kopec concluded.

"This partnership with Lattice enables Mentor Graphics to deliver new tools and performance enhancements to our mutual customer base and is a further affirmation of our leadership as an FPGA design solutions provider," said Simon Bloch, general manager of the Design Creation and Synthesis Division at Mentor Graphics. "The power of the Precision RTL synthesis tool and Lattice's new FPGA families, including the LatticeECP-DSP and LatticeEC devices, will provide Lattice users a winning combination for all their FPGA design requirements."

Improved Performance and New, Advanced Design Capabilities
The Precision RTL synthesis tool is optimized to deliver superior synthesis results quickly and easily. In addition, it provides a breadth of advanced design creation and design analysis capabilities, such as a full-featured, ASIC-strength static timing analysis tool and intuitive design project management. Mentor Graphics is currently optimizing Precision RTL support for the new Lattice FPGA device architectures. Shipments of Lattice ispLEVER, including the Precision RTL synthesis tool, are expected later this quarter. Until then, and during an appropriate transition period, Lattice will continue to provide Mentor Graphics LeonardoSpectrum synthesis tools to its customers.

In addition to the inclusion of the Precision RTL synthesis tool, the performance of the Lattice OEM version of Mentor Graphics ModelSim simulator has been enhanced for verifying complex designs. Simulation performance and capacity have been increased and will be available to Lattice customers in the 4.2 release of the ispLEVER tools.

About LatticeECP/EC FPGAs
The LatticeECP-DSP and LatticeEC FPGA device families are architected to provide the most optimized feature sets combined with the lowest total solution costs of any FPGAs. The new LatticeECP-DSP products, targeted for high-performance DSP applications, provide up to a 50% performance and 75% logic utilization improvement over other low-cost solutions when implementing common DSP functions. The LatticeEC FPGA product family, targeted for general-purpose FPGA applications, is a precise and targeted response to the market's explosive demand for low-cost, architecturally streamlined logic solutions. Through advanced 130nm silicon technology, an optimized architecture and proprietary circuit design, the new Lattice devices lower total solution costs by up to 30% to 50% compared with existing FPGA solutions, and are expected to broaden the adoption of FPGAs within the $20 billion ASIC marketplace.

About Mentor Graphics
Mentor Graphics Corporation (NASDAQ: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $675 million and employs approximately 3,800 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site: http://www.mentor.com/.

About Lattice Semiconductor
Lattice Semiconductor Corporation designs, develops and markets the broadest range of Field Programmable Gate Arrays (FPGA), Field Programmable System Chips (FPSC) and high-performance ISP™ Programmable Logic Devices (PLD), including Complex Programmable Logic Devices (CPLD), Programmable Analog Chips (PAC™), and Programmable Digital Interconnect (GDX™). Lattice also offers industry leading SERDES products. Lattice is “Bringing the Best Together” with comprehensive solutions for today's system designs, delivering innovative programmable silicon products that embody leading-edge system expertise.

Lattice products are sold worldwide through an extensive network of independent sales representatives and distributors, primarily to OEM customers in the fields of communications, computing, computer peripherals, instrumentation, industrial controls and military systems. Company headquarters are located at 5555 NE Moore Court, Hillsboro, Oregon 97124-6421, USA; telephone 503-268-8000, fax 503-268-8037. For more information about Lattice Semiconductor Corporation, visit http://www.latticesemi.com

Statements in this news release looking forward in time are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Investors are cautioned that forward-looking statements involve risks and uncertainties including market acceptance and demand for new products, dependencies on business partners and suppliers, the impact of competitive products and pricing, technological and product development risks and other risk factors detailed in the Securities and Exchange Commission filings. Actual results may differ materially from forward-looking statements.

Lattice Semiconductor Corporation, Lattice (& design), L (& design), GDX, ISP, ispLEVER, LatticeEC, LatticeECP, LatticeECP-DSP, PAC, and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries.

Mentor Graphics, Precision, ModelSim, Leonardo, LeonardoSpectrum, and specific product designations are either registered trademarks or trademarks of Mentor Graphics Corporation or its subsidiaries in the United States and/or other countries.

GENERAL NOTICE: Other product names used in this publication are for identification purposes only and may be trademarks of their respective holders.

For more information contact:

LATTICE EDITORIAL/READER CONTACT:
Brian Kiernan
Lattice Semiconductor Corporation
503-268-8739 voice
503-268-8193 fax
brian.kiernan@latticesemi.com

Debra Layton
Mentor Graphics Corporation
720-494-1043 voice
720-494-1266 fax
debra_layton@mentor.com